Bob Camp wrote:
Hi

My main concern with the low frequency pole in the sound card is the quality of the R/C 
used. You can certainly model what ever you have. If they used an aluminum electrolytic 
for the "C" it may not be the same next time you check it ....

One should at least calibrate the effect before and after each run.
It would be even better to embed such a calibration within each run.
On a 10 Hz system, a 1 Hz pole is probably not an issue. It might get in the 
way with a 1 Hz beat note.

Another thing I have only seen in passing: "Sigma Delta's have poor low frequency 
noise characteristics". I haven't dug into it to see if that's really true or not. 
If you buy your own ADC's, you certainly would not be restricted to a Sigma Delta.

The input noise spectrum for my sound card does indeed rise significantly at low frequencies. A beat note of around 100Hz or 1KHz note would be more suitable than lower frequencies. With a Costas receiver the equivalent timing noise isn't strongly dependent on the beat frequency.
Even with a cheap pre-built FPGA board, you could look into higher sample rates 
than a conventional sound card. You would drop back to 16 bits, but it might be 
worth it.

Bob


1 bit of a 16 bit accurate ADC corresponds to a timing resolution of around 0.48ps referred to a 10MHz mixer input signal. The beat frequency amplitude has to be amplified to just below the ADC full scale input.

Bruce
On Feb 6, 2010, at 6:46 PM, Bruce Griffiths wrote:

Even better is to toss out the mixers and sample the RF signals directly.
However suitable ADCs cost $US100 or more each.
To which one has to add an FPGA and an interface to a PC with sufficient 
throughput to handle the down converted I + Q samples.

Bob Camp wrote:
Hi

You probably could put a couple of cheap DAC's
(ADCs are preferable as it avoids having to implement the conversion logic plus 
comparator required when using a DAC.)

on a board with a FPGA and reduce the data on the fly. I'd guess that would be 
be in the same $100 range as a half way decent sound card. Clock the DAC's off 
of a 10 MHz reference and eliminate the cal issue.

If you are down around 10 Hz or worse yet 1 Hz, the AC coupling of the sound 
card will get in the way, even with a bandpass approach. You really don't know 
what they may have in there at the low end. Build it yourself and that stuff's 
not an issue.

Bob


My sound card has a 1Hz cutoff  RC high pass input filter plus an internal high 
pass digital filter.
Its not too difficult to measure the sound card frequency response using a 
white noise source for example.

Bruce
On Feb 6, 2010, at 6:12 PM, Bruce Griffiths wrote:


If one has a high end sound card then it could be used to implement the 
bandpass filter and replace the zero crossing detector.
It may be necessary to insert a pilot tone to calibrate the sound card sampling 
clock frequency.
A noise floor of about 1E-13/Tau should be achievable.
This simplifies the DMTD system by replacing the zero crossing detector with a 
low gain linear preamp.

If one analyses the resultant data off line then one can also try out different 
techniques such as a Costas receiver rather than a simple bandpass filter plus 
zero crossing detector.
However 1000 seconds of data for 2 channels of 24 bit samples at 192KSPS will 
result in a file with a size of at least 1.15GB.

Bruce


Bruce Griffiths wrote:

If one were to use a bandpass filter with a Q of 10 to filter the beat 
frequency output of the mixer, then if the input frequency is 10MHz and the 
filter component tempco is 100ppm/C then the resultant phase shift tempco is 
about 16ps/C referred to the mixer input frequency.

This phase shift tempco is certainly low enough not to have significant impact 
when measuring the frequency stability of a typical 10811A  if the temperature 
fluctuations are kept small enough during the run.

The effect of using a bandpass filter with too narrow a bandwidth is to 
artificially reduce ADEV for small Tau, so it may be prudent to use a higher 
beat frequency that 1Hz or even 10Hz and not calculate ADEV for Tau less than 
say 10(??) times the beat frequency period. A trade off between this and the 
effect of aliasing is required.

Bruce

Bob Camp wrote:

Hi

With most 10811 range oscillators  the impact of a simple bandpass filter is 
low enough to not be a major issue. That's for normal lab temperatures with the 
circuitry in a conventional die cast  box. No guarantee if you open the window 
and let the fresh air blow in during the run.

That's true with a heterodyne. I can see no obvious reason it would not be true 
on DMTD.

Bob


On Feb 6, 2010, at 5:12 PM, Bruce Griffiths wrote:


The only major issue with DMTD systems is that they undersample the phase 
fluctuations and hence are subject to aliasing effects.
The low pass filter has to have a bandwidth of the same order as the beat 
frequency or the beat frequency signal will be significantly attenuated.
Since the phase is only sampled once per beat frequency period the phase 
fluctuations are undersampled.
Various attempts to use both zero crossings have not been successful.

In principle if one can overcome the increased phase shift tempco associated 
with a bandpass filter, using a bandpass filter can in principle ensure that 
the phase fluctuations are oversampled.


Bruce

Bob Camp wrote:

Hi

A straight heterodyne system will get you to the floor of most 10811's with a 
very simple (2 stage) limiter. As with the DMTD, the counter requirements 
aren't really all that severe.

Bob


On Feb 6, 2010, at 4:24 PM, WarrenS wrote:




"It's possible / likely for injection lock ... to be a problem ..."


Something I certainly worried about and tested for.
What I found (for MY case) is that injection lock is NOT a problem.
The reason being is that unlike most other ways, where the two OSC have to be 
completely independent,
The tight loop approach forces the Two Osc to "Lock with something like 60 + db 
gain,
so a little stray -80db injection lock coupling that would very much limit 
other systems has
no measurable effect at e-13. Just one of the neat little side effects that 
make the tight loop approach so simple.



"then a part in 10^14 is going to be at the 100 of nanovolts level."


For that example, just need to put a simple discrete 100 to 1 resistor divider
in-between the control voltage and the EFC and now you have a nice workable 
10uv.
BUT the bigger point is, probable not needed, cause you are NOT going to do any 
better than the stability of the OSC with a grounded shorted EFC input.

as you said and I agree is so true:


"There is no perfect way to do any of this, only a lot of compromises ... you need 
to watch out for".


But you did not offer any easier way to do it, which is what the original 
request was for and my answer addressed.
This is the cheapest easiest way BY FAR to get high performance, at low tau, 
ADEV numbers that I've seen.

ws
***************

----- Original Message ----- From: "Bob Camp"<[email protected]>
To: "Discussion of precise time and frequency measurement"<[email protected]>
Sent: Saturday, February 06, 2010 12:09 PM
Subject: Re: [time-nuts] ADEV vs MDEV




Hi

It's possible / likely to injection lock with the tight loop approach and get 
data that's much better than reality. A lot depends on the specific oscillators 
under test and the buffers (if any) between the oscillators and mixer.

If your OCVCXO has a tuning slope of 0.1 ppm / volt then a part in 10^14 is 
going to be at the 100 of nanovolts level. Certainly not impossible, but it 
does present it's own set of issues. Lab gear to do it is available, but not 
all that common. DC offsets and their temperature coefficients along with 
thermocouple effects could make things exciting.

There is no perfect way to do any of this, only a lot of compromises here or 
there. Each approach has stuff you need to watch out for.

Bob

--------------------------------------------------
From: "WarrenS"<[email protected]>
Sent: Saturday, February 06, 2010 2:19 PM
To: "Discussion of precise time and frequency measurement"<[email protected]>
Subject: Re: [time-nuts] ADEV vs MDEV



Peat said:


I would appreciate any comments or observations on the topic of apparatus with 
demonstrated stability measurements.
My motivation is to discover the SIMPLEST scheme for making stability 
measurements at the 1E-13 in 1s  performance level.


If you accept that the measurement is going to limited by the Reference Osc,
for Low COST and SIMPLE, with the ability to measure ADEVs at that level,
Can't beat a simple analog version of  NIST's "Tight Phase-Lock Loop Method of 
measuring Freq stability".
http://tf.nist.gov/phase/Properties/one.htm#oneone    Fig 1.7


By replacing the "Voltage to freq converter, Freq counter&     Printer with a 
Radio shack type PC data logging DVM,
It can be up and running from scratch in under an Hr, with no high end test 
equipment needed.
If you want performance that exceeds the best of most DMTD at low Tau it takes 
a little more work
and a higher speed oversampling ADC data logger and a good offset voltage.

I must add this is not a popular solution (Or a general Purpose one) but
IF  you know analog and have a GOOD osc with EFC to use for the reference,
as far as I've been able to determine it is the BEST SIMPLE answer that allows 
High performance.
Limited by My HP10811 Ref OSC, I'm getting better than 1e-12 in 0.1 sec (at 30 
Hz Bandwidth)

Basic modified NIST Block Diag attached:
The NIST paper sums it up quite nicely:
'It is not difficult to achieve a sensitivity of a part in e14 per Hz resolution
so one has excellent precision capabilities with this system.'

This does not address your other question of ADEV vs MDEV,
What I've described is just a simple way to get the Low cost, GOOD Raw data.
What you then do with that Data is a different subject.

You can run the raw data thru one of the many ADEV programs out there, 
'Plotter' being my choice.


Have fun
ws

*************

[time-nuts] ADEV vs MDEV
Pete Rawson peterawson at earthlink.net
Sat Feb 6 03:59:18 UTC 2010

Efforts are underway to develop a low cost DMTD apparatus with
demonstrated stability measurements of 1E-13 in 1s. It seems that
existing TI counters can reach this goal in 10s. (using MDEV estimate
or 100+s. using ADEV estimate). The question is; does the MDEV tool
provide an appropriate measure of stability in this time range, or is
the ADEV estimate a more correct answer?

The TI performance I'm referring to is the 20-25 ps, single shot TI,
typical for theHP5370A/B, the SR620 or the CNT81/91. I have data
from my CNT81showing MDEV<     1E-13 in 10s. and I believe the
other counters behave similarly.

I would appreciate any comments or observations on this topic.
My motivation is to discover the simplest scheme for making
stability measurements at this performance level; this is NOT
even close to the state-of-the-art, but can still be useful.

Pete Rawson







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