Pete
Not sure how you implemented the 4ms holdoff.
With a 5370A/B I would have cascaded a pair of 74HC4059's to divide down
f1(~10MHz) produce a 200Hz (or whatever frequency desired eg 10Hz, 1Hz
etc) signal to drive the external ARM input.
Connected f1 to the START input and f2 (~ 10MHz but can be any frequency
within the counter input bandwidth) to the STOP input.
The jitter of the 200Hz arming signal isn't critical. The counter then
starts on the next zero crossing transition following the ARM signal
transition and stops on the next STOp input signal transition.
Unwrap the phase measurements and calculate ADEV, MDEV etc.
If one uses a 74AHC74 to resynchronise the output of each HC4059 then
the divider should be usable to 20MHz or so without any ambiguity in
identifying the next clock transition after each divider output transition.
Bruce
Pete Rawson wrote:
Bruce,
THANKS.
The paper you provided the last link for is excellent.
I haven't seen it before& it provides a marvelous
explanation of the various stability tools.
The specs on the CNT81 don't reveal that the 50ps
single shot TI capability is what the built-in display
shows. The GPIB data provides 25ps resolution,
which is the internal data.
My measurement setup begins with a Wenzel
Sprinter OCXO @ 100MHz. This feeds an Analog
Devices AD9513 evaluation board providing 2
10MHz outputs (norm& complement). One of
these outputs clocks a 74HC4059 in divide by
1E4 mode. That 1KHz pulse starts the CNT81.
The other 10MHz output stops the CNT81.
The TI measurement is paced at 4ms delay.
The CNT81 reference is supplied by a Tbolt
10MHz output.
The resulting series of TI measurements are
nominally 77ns, taken every 5ms, back-to-back.
I use "Plotter" to analyze and plot the ADEV&
MDEV results (Thank you to Ulrich for such a
fine tool). The MDEV line crosses the 1E-13
level at, or very near, 10s. As expected, the MDEV
slope is -3/2 on the log-log plot vs. the ADEV
slope of -1.
I would be happy to send a typical data file to
you, if it would be of interest.
Pete
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