Hello,
No, it is not the same. If you just use the MSB of the accumulator, it
has a lot of period jitter. It can be unnoticeable if the ration between
reference frequency and output frequency is very high.
Think on the process inversely: draw a sine wave, and sample it at for
example 4.3 samples per period, and look when the sample becames
positive and when it is negative (that would be the same to take only
the MSB).
Best regards
Javier
El 20/06/2011 16:46, Luis Cupido escribió:
Folks, a quick one...
A DDS, that is an accumulator with a DAC followed by a low pass filter
and comparator (zero crossing) to produce a square wave to drive a PLL
or a MIXER or else (at logic levels).
Isn't it the very same thing as just using the most significant bit of
the accumulator.
Or am I missing something here ?
Comments appreciated.
thanks.
Luis Cupido.
ct1dmk.
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HV Sistemas S.L. PHONE: +34 949 336 806
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