De nada, Luis :)
I've been playing around a bit with Altera NCO IP (in fact, I need to
implement a digital NCO quite shortly for a project, although in this
case close-in spurs are more tolerable than in other applications). A
lot of information in the application note for ADI is also applicable to
the purely digital side. I've not yet played on the practical side -
this will be after summer :)
Quartus software (for Altera FPGAs) enables to customize several
parameters of their NCO IP, and plots an expected spectrum of the output
signal. It is fun to explore the effect of different sin/cos algorithms
(ROM-based, CORDIC, multiplier-based), phase accumulator and magnitude
precision, and angular resolution. Although the IP is not free (but can
be used for evaluation), Quartus Web Edition (that it is free) enables
to play a bit around - and at least it is illustrative :)
I forgot that Section 7 shows what occurs taking only the MSB (it shows
it using a comparator after the DAC, without filtering and also after
filtering).
Best regards,
Javier
El 20/06/2011 18:46, Luis Cupido escribió:
Gracias, Javier.
As you read in my previous email I'm basically
worried about close-in spurs (those that
will pass through the PLL loop filter).
will digest that 4th section... tks.
...
Since I'm inside an FPGA... I'm eager to get
spurs down without leaving the digital world...
Anyone knows any literature covering that ?
Thanks.
Luis cupido.
ct1dmk.
On 6/20/2011 4:52 PM, Javier Herrero wrote:
To reduce the spurii due to quantization distortion. Here is an
explanation, in Section 4
http://www.analog.com/static/imported-files/tutorials/450968421DDS_Tutorial_rev12-2-99.pdf
Regards,
Javier
El 20/06/2011 17:39, Luis Cupido escribió:
Well, if we really need to filter it out
we better filter the MSB and square it
again...
Why having a DAC for ???
Right ?
Luis Cupido.
ct1dmk.
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