On 07/21/2011 08:44 PM, Jim Lux wrote:
On 7/21/11 8:30 AM, Luis Cupido wrote:
Magnus,
It crossed my mind of messing somehow with the phase
accumulator metrics but did not figure a way...
that is a good suggestion I will investigate in that direction...
(or maybe... if you do have a bit of free time to drop me
a couple of lines more, could you please detail
a bit more as so far I did not caught the idea clearly enough to start
coding...)
You can set up a sine table with any number of entries. Powers of two
are popular, but, it could be anything..
Say you had multiple tables, one 20 long, one 21 long, one 22 long.
You could use the 20 long one for generating 1/20th of a Hz, the 21 long
one for generating 1/21th Hz, etc.
That so obvious, we did not consider it a problem. The problem is when
you need a large variation of N. Using a tuneable scaling to map into a
suitable length (power of too) would be a better choice. Most FPGAs
today have hardware multiplier blocks that can do the scaling needed,
otherwise shift-add scaling (similar to CORDIC) would be a possibility
as I mentioned in another post.
Cheers,
Magnus
_______________________________________________
time-nuts mailing list -- [email protected]
To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
and follow the instructions there.
