Magnus,
It crossed my mind of messing somehow with the phase
accumulator metrics but did not figure a way...
that is a good suggestion I will investigate in that direction...

(or maybe... if you do have a bit of free time to drop me
a couple of lines more, could you please detail
a bit more as so far I did not caught the idea clearly enough to start coding...)

Luis Cupido.
ct1dmk.
p.s. No problem with the delay... ;-)

On 7/21/2011 9:11 AM, Magnus Danielson wrote:
On 21/06/11 12:48, Luis Cupido wrote:
Yes that right. Is clear that I would have a 10ns jitter,
So the catch would be to find a scheme to spread spurs out or to push
them away from carrier. Then they would not bother me (would not pass
the PLL).

You want to consider a phase-accumulator with a steerable or suitable
sequence length. That way you can match up the ratio to form a suitable
for the frequency you want and the spurioses will become harmonics so to
speak.

Such a phase-accumulator gets shortend and takes some comparision of
phase-state to translate state at the end of the sequence to the next
period. A bit more logic, but comes with some nice properties.

Cheers,
Magnus - this reply was only a month late...

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