Ryan wrote:
Also confusing is the quad op-amp seems to be saturated at the negative rail. I can see this Opamp feeds the adjust pin on the OCXO, but Im not sure what feeds it. Guessing the FPGA? I still cant find the DAC all I see are these pictures [ ] but the pictures arent of the DAC, unless the DAC is a resistor ladder (hadnt thought of that until now). Now Im starting to realize this is probably the case.
Stewart Cobb described the operation of the DAC (actually, PWM) in a post on Nov 2, 2013 ("Subject: [time-nuts] Thunderbolt tuning DAC theory of operation"). Check the list archive.
Does it seem likely the 5V reference is dead?
If the output is at 0.6v, as you say, then either the reference chip is bad or something on the load side of the 5v reference bus is drawing too much current and dragging it down.
I dont really want to just lift the output of the 5V reference and leave whatever it feeds floating.
Why not lift the output pin and connect the PC trace to the 5v logic supply through, say, 470 ohms? This will limit the current through the load to ~10mA if the load side is bad. Then measure the voltages on the referrence output pin and the PC trace. One or the other should be ~5v (unless the reference and the load side are both bad). The one that is low will tell you which side (reference or load) is the problem.
Best regards, Charles _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
