I&Q sine sampling works, but a continuous sampling allows for N samples
to reduce the noise by sqrt(N) rather than 2 samples. The white-noise
will be the limiting factor for the higher rates.
Least-square estimation provides a 2.5 dB improvement over straight
sample average.
Cheers,
Magnus
On 05/03/2016 10:33 PM, David wrote:
Wouldn't this be a natural application of a centroid or transition
midpoint timing TDC implemented with a pulse shaper, fast ADC, and
FPGA?
What about sampling inphase and quadrature sine waves? This should be
more amendable to a microcontroller only solution and if I had to
start working on something immediately, this is what I would try
first.
I assume in the earlier discussion Bruce mentioned these methods since
they are included on his page of the various ways to implement TDCs:
http://www.ko4bb.com/~bruce/TDC.html
On Tue, 3 May 2016 08:40:53 -0700, you wrote:
HP/Agilent/Keysight laser interferometers
measure at the kind of rates you are talking
about and (last time I heard) could divide
an interference fringe down to 1/512 of a
wavelength. As you say, they definitely use
an ASIC with a ring oscillator. Perhaps
there is some way you could repurpose the
interferometer electronics to make your
measurement.
You also might consider that over 25 years
ago, HP developed the 5313X counters with
interpolators implemented in FPGA's. The
FPGA's available now are vastly more
sophisticated and much faster. Perhaps there
is a way you do your ASIC in an FPGA.
If you really do need an ASIC, the best way
to get that done is to partner with a university
and have some PhD student design it. Universities
often have arrangements to do this.
Rick
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