On Fri, 13 Apr 2018 08:54:41 -0700
John Larkin <[email protected]> wrote:
> If you walk the differential data and clock inputs of an NB7V52 CML
> flipflop across one another in time, the equivalent jitter is below 20
> fs RMS. That's what we're measuring, but our test rig may well dominate
> the jitter, so the flop is probably better.
I heard similar numbers for the NB7V52 last week at EFTF. So you
cannot be that far off.
Attila Kinali
--
<JaberWorky> The bad part of Zurich is where the degenerates
throw DARK chocolate at you.
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