On Thu, Jun 14, 2018 at 4:48 AM, Janine Hagemann <[email protected]> wrote: > The data manual for DP83867IR/CR, SNLS484E[1], revised march 2017, > advises that strapping RX_DV/RX_CTRL pin in mode 1 and 2 is not > supported (see note below Table 5 (4-Level Strap Pins)). > > There are some boards which have the pin strapped this way and need > software workaround suggested by the data manual. Bit[7] of > Configuration Register 4 (address 0x0031) must be cleared to 0. This > ensures proper operation of the PHY. > > Implement driver support for device-tree property meant to advertise > the wrong strapping. > > [1] http://www.ti.com/lit/ds/snls484e/snls484e.pdf > > Based on commit '371444764b9882d754d1e67dd212c932359a2293' of mainline > linux kernel.
And here... > Signed-off-by: Janine Hagemann <[email protected]> Otherwise, Acked-by: Joe Hershberger <[email protected]> _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
