The sysreset_rockchip driver uses the rockchip_get_cru() helper to get the CRU base address. However, use of this helper adds unnecessary abstractions and limits the driver to only work for a single SoC.
Add a rockchip_sysreset_bind() helper intended to be used in clock drivers. This helper expects the CRU base address and the offset to the global reset state register as parameters in addition to the offset to the first and second global software reset register. The helper wraps similar handling as existing clock drivers, and will be extended to make use of the CRU base address and state register offset after all clock drivers have been converted to use this helper. Signed-off-by: Jonas Karlman <[email protected]> --- arch/arm/include/asm/arch-rockchip/clock.h | 15 +++++++++++ drivers/sysreset/sysreset_rockchip.c | 31 ++++++++++++++++++++-- 2 files changed, 44 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h index cf8bb0f04636..1b12867b489b 100644 --- a/arch/arm/include/asm/arch-rockchip/clock.h +++ b/arch/arm/include/asm/arch-rockchip/clock.h @@ -186,6 +186,21 @@ void rk3288_clk_configure_cpu(struct rockchip_cru *cru, struct rk3288_grf *grf); int rockchip_get_clk(struct udevice **devp); +/* + * rockchip_sysreset_bind() - Bind system reset device as child of clock device + * + * @pdev: clock udevice + * @cru_base: base address of the clock/reset unit registers + * @glb_rst_st: offset of the global reset state register + * @glb_srst_fst: offset of the first global software reset register + * @glb_srst_snd: offset of the second global software reset register + * Return: 0 success, or error value + */ +int rockchip_sysreset_bind(struct udevice *pdev, + unsigned long cru_base, + unsigned int glb_rst_st, + unsigned int glb_srst_fst, + unsigned int glb_srst_snd); /* * rockchip_reset_bind() - Bind soft reset device as child of clock device * diff --git a/drivers/sysreset/sysreset_rockchip.c b/drivers/sysreset/sysreset_rockchip.c index 00308f9a33b7..39cb16ec5456 100644 --- a/drivers/sysreset/sysreset_rockchip.c +++ b/drivers/sysreset/sysreset_rockchip.c @@ -4,10 +4,11 @@ */ #include <dm.h> -#include <errno.h> +#include <dm/device-internal.h> +#include <dm/lists.h> +#include <stdlib.h> #include <sysreset.h> #include <asm/arch-rockchip/clock.h> -#include <asm/arch-rockchip/cru_rk3328.h> #include <asm/arch-rockchip/hardware.h> #include <linux/err.h> @@ -42,3 +43,29 @@ U_BOOT_DRIVER(sysreset_rockchip) = { .id = UCLASS_SYSRESET, .ops = &rockchip_sysreset, }; + +int rockchip_sysreset_bind(struct udevice *pdev, + unsigned long cru_base, + unsigned int glb_rst_st, + unsigned int glb_srst_fst, + unsigned int glb_srst_snd) +{ + struct udevice *sysreset_dev; + struct sysreset_reg *priv; + int ret; + + ret = device_bind_driver(pdev, "rockchip_sysreset", "sysreset", + &sysreset_dev); + if (ret) + return ret; + + priv = malloc(sizeof(struct sysreset_reg)); + if (!priv) + return -ENOMEM; + + priv->glb_srst_fst_value = glb_srst_fst; + priv->glb_srst_snd_value = glb_srst_snd; + dev_set_priv(sysreset_dev, priv); + + return 0; +} -- 2.54.0
