Convert to use the rockchip_sysreset_bind() helper to bind the
rockchip_sysreset driver. Also add and use CRU base address constants
based on the clock-controller addresses used in the SoC device tree.

Signed-off-by: Jonas Karlman <[email protected]>
---
 .../arm/include/asm/arch-rockchip/cru_rk3399.h |  3 +++
 drivers/clk/rockchip/clk_rk3399.c              | 18 +++++-------------
 2 files changed, 8 insertions(+), 13 deletions(-)

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h 
b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index d941a129f3e5..b86ae4c7e598 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -95,6 +95,9 @@ check_member(rockchip_cru, sdio1_con[1], 0x594);
 
 #define PWM_CLOCK_HZ    PMU_PCLK_HZ
 
+#define RK3399_PMU_CRU_BASE            0xff750000
+#define RK3399_CRU_BASE                        0xff760000
+
 enum apll_l_frequencies {
        APLL_L_1600_MHZ,
        APLL_L_600_MHZ,
diff --git a/drivers/clk/rockchip/clk_rk3399.c 
b/drivers/clk/rockchip/clk_rk3399.c
index 6e87db18be07..9811f94a13f8 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1492,22 +1492,14 @@ static int rk3399_clk_of_to_plat(struct udevice *dev)
 static int rk3399_clk_bind(struct udevice *dev)
 {
        int ret;
-       struct udevice *sys_child;
-       struct sysreset_reg *priv;
 
        /* The reset driver does not have a device node, so bind it here */
-       ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
-                                &sys_child);
-       if (ret) {
+       ret = rockchip_sysreset_bind(dev, RK3399_CRU_BASE,
+                       offsetof(struct rockchip_cru, glb_rst_st),
+                       offsetof(struct rockchip_cru, glb_srst_fst_value),
+                       offsetof(struct rockchip_cru, glb_srst_snd_value));
+       if (ret)
                debug("Warning: No sysreset driver: ret=%d\n", ret);
-       } else {
-               priv = malloc(sizeof(struct sysreset_reg));
-               priv->glb_srst_fst_value = offsetof(struct rockchip_cru,
-                                                   glb_srst_fst_value);
-               priv->glb_srst_snd_value = offsetof(struct rockchip_cru,
-                                                   glb_srst_snd_value);
-               dev_set_priv(sys_child, priv);
-       }
 
 #if CONFIG_IS_ENABLED(RESET_ROCKCHIP)
        ret = offsetof(struct rockchip_cru, softrst_con[0]);
-- 
2.54.0

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