Convert to use the rockchip_sysreset_bind() helper to bind the rockchip_sysreset driver. Also add and use a CRU base address constant based on the clock-controller address used in the SoC device tree.
Signed-off-by: Jonas Karlman <[email protected]> --- .../arm/include/asm/arch-rockchip/cru_rv1108.h | 2 ++ drivers/clk/rockchip/clk_rv1108.c | 18 +++++------------- 2 files changed, 7 insertions(+), 13 deletions(-) diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h index 0ba5ff6a04f2..50d99485dcb0 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h @@ -60,6 +60,8 @@ struct pll_div { u32 frac; }; +#define RV1108_CRU_BASE 0x20200000 + enum { /* PLL CON0 */ FBDIV_MASK = 0xfff, diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c index e1b9ccf1236a..3dcfb3385a4d 100644 --- a/drivers/clk/rockchip/clk_rv1108.c +++ b/drivers/clk/rockchip/clk_rv1108.c @@ -680,22 +680,14 @@ static int rv1108_clk_probe(struct udevice *dev) static int rv1108_clk_bind(struct udevice *dev) { int ret; - struct udevice *sys_child; - struct sysreset_reg *priv; /* The reset driver does not have a device node, so bind it here */ - ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset", - &sys_child); - if (ret) { + ret = rockchip_sysreset_bind(dev, RV1108_CRU_BASE, + offsetof(struct rv1108_cru, glb_rst_st), + offsetof(struct rv1108_cru, glb_srst_fst_val), + offsetof(struct rv1108_cru, glb_srst_snd_val)); + if (ret) debug("Warning: No sysreset driver: ret=%d\n", ret); - } else { - priv = malloc(sizeof(struct sysreset_reg)); - priv->glb_srst_fst_value = offsetof(struct rv1108_cru, - glb_srst_fst_val); - priv->glb_srst_snd_value = offsetof(struct rv1108_cru, - glb_srst_snd_val); - dev_set_priv(sys_child, priv); - } #if CONFIG_IS_ENABLED(RESET_ROCKCHIP) ret = offsetof(struct rv1108_cru, softrst_con[0]); -- 2.54.0
