Convert to use the rockchip_sysreset_bind() helper to bind the
rockchip_sysreset driver. Also add and use a CRU base address constant
based on the clock-controller address used in the SoC device tree.

Signed-off-by: Jonas Karlman <[email protected]>
---
 arch/arm/include/asm/arch-rockchip/cru_rk3066.h |  2 ++
 drivers/clk/rockchip/clk_rk3066.c               | 17 ++++-------------
 2 files changed, 6 insertions(+), 13 deletions(-)

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3066.h 
b/arch/arm/include/asm/arch-rockchip/cru_rk3066.h
index 76a715a8e6a8..2d94a4ee1419 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3066.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3066.h
@@ -60,6 +60,8 @@ struct rk3066_cru {
 
 check_member(rk3066_cru, cru_glb_cnt_th, 0x0140);
 
+#define RK3066_CRU_BASE                        0x20000000
+
 /* CRU_CLKSEL0_CON */
 enum {
        REG(CPU_ACLK_PLL, 8, 8),
diff --git a/drivers/clk/rockchip/clk_rk3066.c 
b/drivers/clk/rockchip/clk_rk3066.c
index f7dea7859f74..84535e41d8db 100644
--- a/drivers/clk/rockchip/clk_rk3066.c
+++ b/drivers/clk/rockchip/clk_rk3066.c
@@ -669,23 +669,14 @@ static int rk3066_clk_probe(struct udevice *dev)
 
 static int rk3066_clk_bind(struct udevice *dev)
 {
-       struct udevice *sys_child;
-       struct sysreset_reg *priv;
        int reg_offset, ret;
 
        /* The reset driver does not have a device node, so bind it here. */
-       ret = device_bind(dev, DM_DRIVER_GET(sysreset_rockchip), "sysreset",
-                         NULL, ofnode_null(), &sys_child);
-       if (ret) {
+       ret = rockchip_sysreset_bind(dev, RK3066_CRU_BASE, 0,
+                       offsetof(struct rk3066_cru, cru_glb_srst_fst_value),
+                       offsetof(struct rk3066_cru, cru_glb_srst_snd_value));
+       if (ret)
                dev_dbg(dev, "Warning: No sysreset driver: ret=%d\n", ret);
-       } else {
-               priv = malloc(sizeof(struct sysreset_reg));
-               priv->glb_srst_fst_value = offsetof(struct rk3066_cru,
-                                                   cru_glb_srst_fst_value);
-               priv->glb_srst_snd_value = offsetof(struct rk3066_cru,
-                                                   cru_glb_srst_snd_value);
-               dev_set_priv(sys_child, priv);
-       }
 
        if (CONFIG_IS_ENABLED(RESET_ROCKCHIP)) {
                reg_offset = offsetof(struct rk3066_cru, cru_softrst_con[0]);
-- 
2.54.0

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