Convert to use the rockchip_sysreset_bind() helper to bind the rockchip_sysreset driver. Also add and use a CRU base address constant based on the clock-controller address used in the SoC device tree.
Signed-off-by: Jonas Karlman <[email protected]> --- .../arm/include/asm/arch-rockchip/cru_rk3308.h | 1 + drivers/clk/rockchip/clk_rk3308.c | 18 +++++------------- 2 files changed, 6 insertions(+), 13 deletions(-) diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h index 091ae82d7cc1..e38d2a7cfdc8 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3308.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h @@ -24,6 +24,7 @@ #define AUDIO_HCLK_HZ 100000000 #define AUDIO_PCLK_HZ 100000000 +#define RK3308_CRU_BASE 0xff500000 #define RK3308_PLL_CON(x) ((x) * 0x4) #define RK3308_MODE_CON 0xa0 diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c index 97043b8693c0..93fbb557c130 100644 --- a/drivers/clk/rockchip/clk_rk3308.c +++ b/drivers/clk/rockchip/clk_rk3308.c @@ -1186,22 +1186,14 @@ static int rk3308_clk_of_to_plat(struct udevice *dev) static int rk3308_clk_bind(struct udevice *dev) { int ret; - struct udevice *sys_child; - struct sysreset_reg *priv; /* The reset driver does not have a device node, so bind it here */ - ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset", - &sys_child); - if (ret) { + ret = rockchip_sysreset_bind(dev, RK3308_CRU_BASE, + offsetof(struct rk3308_cru, glb_rst_st), + offsetof(struct rk3308_cru, glb_srst_fst), + offsetof(struct rk3308_cru, glb_srst_snd)); + if (ret) debug("Warning: No sysreset driver: ret=%d\n", ret); - } else { - priv = malloc(sizeof(struct sysreset_reg)); - priv->glb_srst_fst_value = offsetof(struct rk3308_cru, - glb_srst_fst); - priv->glb_srst_snd_value = offsetof(struct rk3308_cru, - glb_srst_snd); - dev_set_priv(sys_child, priv); - } #if CONFIG_IS_ENABLED(RESET_ROCKCHIP) ret = offsetof(struct rk3308_cru, softrst_con[0]); -- 2.54.0
