Describe how to build U-Boot for the Arduino VENTUNO Q as BL33 of TF-A and OP-TEE, how the boot moves to a Cortex-A55 core, the memory layout and how to flash and boot a UKI. Add a MAINTAINERS entry for the board.
Assisted-by: Claude:claude-opus-5-5 Signed-off-by: Tyler Baker <[email protected]> --- board/qualcomm/MAINTAINERS | 7 ++++++ doc/board/qualcomm/index.rst | 1 + doc/board/qualcomm/ventuno-q.rst | 53 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 61 insertions(+) diff --git a/board/qualcomm/MAINTAINERS b/board/qualcomm/MAINTAINERS index 3767a2a794..85c92f4007 100644 --- a/board/qualcomm/MAINTAINERS +++ b/board/qualcomm/MAINTAINERS @@ -1,6 +1,13 @@ # This MAINTAINERS file is for folks with an interest in a particular platform # or board under ARM SNAPDRAGON +ARDUINO VENTUNO Q +M: Tyler Baker <[email protected]> +S: Maintained +F: arch/arm/dts/monaco-arduino-monza-u-boot.dtsi +F: board/qualcomm/arduino-ventuno-q.config +F: doc/board/qualcomm/ventuno-q.rst + QUALCOMM DRAGONWING QCS615 M: Aswin Murugan <[email protected]> S: Maintained diff --git a/doc/board/qualcomm/index.rst b/doc/board/qualcomm/index.rst index 56b8d894c2..85b01f7bf6 100644 --- a/doc/board/qualcomm/index.rst +++ b/doc/board/qualcomm/index.rst @@ -13,6 +13,7 @@ Qualcomm rb3gen2 rubikpi3 iq8 + ventuno-q phones rdp signing diff --git a/doc/board/qualcomm/ventuno-q.rst b/doc/board/qualcomm/ventuno-q.rst new file mode 100644 index 0000000000..80d76f1f99 --- /dev/null +++ b/doc/board/qualcomm/ventuno-q.rst @@ -0,0 +1,53 @@ +.. SPDX-License-Identifier: GPL-2.0 +.. sectionauthor:: Tyler Baker <[email protected]> + +Arduino VENTUNO Q +================= + +The Arduino VENTUNO Q is built around the Qualcomm QCS8275 (Monaco) SoC, with +four Cortex-A78C and four Cortex-A55 cores, and boots from eMMC. + +These instructions cover U-Boot as the BL33 payload of an open TF-A and OP-TEE +boot chain, where XBL loads TF-A BL2 from the ``tz`` partition and the FIP +from the ``uefi`` partition. TF-A support is described in the TF-A +documentation (``docs/plat/qti/monza.rst``). + +Boot CPU +-------- + +XBL and TF-A enter U-Boot on CPU0, a Cortex-A78C. The Cortex-A78C cores have +pointer authentication and the Cortex-A55 cores do not, and Linux only brings +up CPUs that match its boot CPU in that respect. With +``CONFIG_BOOT0_QCOM_BOOT_CPU`` U-Boot powers on the first Cortex-A55 (MPIDR +``0x10000``) at its entry point with PSCI ``CPU_ON`` and turns CPU0 off, so +U-Boot and Linux run on the Cortex-A55 and all eight CPUs come online. + +Memory +------ + +SMEM describes all of DDR, including the regions the boot firmware keeps for +itself (SAIL, the SAIL mailboxes, the pIMEM vault with the trusted +applications, CPUCP firmware). ``monaco-arduino-monza-u-boot.dtsi`` gives U-Boot +a memory map that leaves them out, so the OS never uses them as RAM. + +Building +-------- + +Build U-Boot with the TF-A/OP-TEE and board configuration fragments:: + + $ export CROSS_COMPILE=<aarch64 toolchain prefix> + $ make qcom_defconfig tfa-optee.config arduino-ventuno-q.config + $ make -j8 + +Then pass ``u-boot.bin`` to the TF-A build as ``BL33`` and turn the resulting +``fip.bin`` into ``fip.elf`` as described in the TF-A documentation. + +Flashing +-------- + +Put the board in EDL mode and write the FIP to both ``uefi`` slots with +`qdl <https://github.com/linux-msm/qdl>`_ and the board's eMMC firehose +programmer:: + + $ qdl --storage emmc prog_firehose_ddr.elf \ + write uefi_a fip.elf write uefi_b fip.elf -- 2.47.3
