Add the Shikra SPL defconfig with the early serial, eMMC, pinctrl, SMEM, QCLIB, FIT-loading, and memory-layout options required for the SPL boot flow.
Signed-off-by: Abhilash V <[email protected]> --- configs/qcom_shikra_spl_defconfig | 109 ++++++++++++++++++++++++++++++ 1 file changed, 109 insertions(+) create mode 100644 configs/qcom_shikra_spl_defconfig diff --git a/configs/qcom_shikra_spl_defconfig b/configs/qcom_shikra_spl_defconfig new file mode 100644 index 00000000000..7bcb3e21a15 --- /dev/null +++ b/configs/qcom_shikra_spl_defconfig @@ -0,0 +1,109 @@ +# SPDX-License-Identifier: GPL-2.0-only +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_POSITION_INDEPENDENT=y +CONFIG_SYS_INIT_SP_BSS_OFFSET=0x180000 +CONFIG_ARCH_SNAPDRAGON=y +CONFIG_TEXT_BASE=0x87980000 +CONFIG_NR_DRAM_BANKS=2 +CONFIG_ENV_SIZE=0x40000 +CONFIG_ENV_OFFSET=0 +# CONFIG_OF_UPSTREAM is not set +CONFIG_DEFAULT_DEVICE_TREE="shikra-cqs-evk" +CONFIG_SYS_LOAD_ADDR=0x90000000 +CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +# CONFIG_BOOTSTD is not set +CONFIG_OF_BOARD_SETUP=y +CONFIG_USE_PREBOOT=y +CONFIG_SYS_PBSIZE=1024 +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_EFI_PARTITION=y +CONFIG_OF_LIVE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_CLK=y +CONFIG_CLK_QCOM_SHIKRA=y +CONFIG_MSM_GPIO=y +CONFIG_MISC=y +CONFIG_QCOM_GENI=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_MMC_SDHCI=y +# CONFIG_MMC_SDHCI_ADMA_HELPERS is not set +# CONFIG_MMC_SDHCI_ADMA is not set +# CONFIG_MMC_SDHCI_ADMA_FORCE_32BIT is not set +# CONFIG_MMC_SDHCI_ADMA_64BIT is not set +CONFIG_MMC_SDHCI_MSM=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_PINCTRL_QCOM=y +CONFIG_PINCTRL_QCOM_SHIKRA=y +CONFIG_DEBUG_UART_MSM_GENI=y +CONFIG_DEBUG_UART_BASE=0x4a80000 +CONFIG_DEBUG_UART_CLOCK=14745600 +CONFIG_MSM_SERIAL=y +CONFIG_MSM_GENI_SERIAL=y +CONFIG_SOC_QCOM=y +CONFIG_SPL=y +CONFIG_SPL_FRAMEWORK=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_OF_LIBFDT=y +CONFIG_SPL_DM=y +CONFIG_SPL_GPIO=y +CONFIG_SPL_DM_GPIO=y +CONFIG_SPL_DM_RESET=y +CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_PINCTRL=y +CONFIG_SPL_PINCTRL_GENERIC=y +CONFIG_SPL_PINCTRL_QCOM=y +CONFIG_SPL_PINCTRL_QCOM_SHIKRA=y +CONFIG_SPL_CLK=y +CONFIG_SPL_CLK_STUB=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL_QCOM_GENI=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_MSM_GENI_SERIAL=y +CONFIG_SPL_SMEM=y +CONFIG_DM_STATS=y +CONFIG_SPL_SYS_MALLOC_F=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x48000 +CONFIG_SPL_SYS_MALLOC=y +CONFIG_SYS_MALLOC_DEFAULT_TO_INIT=y +CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y +CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80008000 +CONFIG_SPL_SYS_MALLOC_SIZE=0x20000 +# CONFIG_SPL_SEPARATE_BSS is not set +# CONFIG_SPL_USE_TINY_PRINTF is not set +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +CONFIG_SPL_TEXT_BASE=0x0C219000 +CONFIG_SPL_MAX_SIZE=0x7B800 +CONFIG_SPL_MMC=y +CONFIG_SPL_MMC_SDHCI_ADMA=y +CONFIG_SPL_MMC_WRITE=y +CONFIG_SPL_SYS_MMCSD_RAW_MODE=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x00 +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_SPL_STACKPROTECTOR=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_ATF=y +CONFIG_SPL_ATF_LOAD_IMAGE_V2=y +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_SPL_HAS_LOAD_FIT_ADDRESS=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x0C2C1800 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_HAVE_INIT_STACK=y +CONFIG_SPL_STACK=0x0C294800 +# CONFIG_SAVE_PREV_BL_FDT_ADDR is not set +CONFIG_SPL_REMAKE_ELF=y +CONFIG_SPL_REMAKE_ELF_LDSCRIPT="board/qualcomm/shikra/shikra-spl-wrap-elf.lds" +CONFIG_QCOM_SPL_BOOTIMEM_FLUSH_BASE=0x0C219000 +CONFIG_QCOM_SPL_BOOTIMEM_FLUSH_SIZE=0x134000 +CONFIG_SYS_BOARD="shikra" -- 2.34.1
