JackOfAll wrote: 
> No, it's still accepting an I2S input, and on-paper it's slave to Pi, by
> which the Pi is sending BCLK and LRCK to DAC as well as DATA..... But
> the Sabre board local OSC and on-chip ASRC, is re-clocking it
> internally, on the Sabre chip. (And if you buy into the Sabre
> white-papers about their hyperstream technology and jitter reduction,
> kind of getting you to the same point as external re-clocking taking
> place.... but then you start the whole new discussion with many people
> preferring to disable the ASRC by using MCLK that is multiple of sample
> rate. And that's a whole new can of worms. I personally don't have a
> problem with Sabre ASRC, and my wisdom says put all the money into one
> very high quality OSC and use the Sabre ASRC, rather than splitting
> funds between 2x OSC's for 44k1/48k multiples. One mans junk is another
> mans treasure.... )Thanks. Sorry if i didn't express myself well  that's 
> pretty much what I
meant by the sabre treating the input -as though- it were S/PDIF. I
assume that the LRCLK is ignored by the Sabre. Or does it actually do
something?


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