Hi Julian,

Are you incrementing the count only when both tvalid and tready signals are
high right?

Jonathon

On Fri, Apr 23, 2021 at 11:40 AM <[email protected]> wrote:

> Paolo -
>
>
> I have been chewing over the two cases you mentioned, and I think I am
> doing the same as your first case, using the 214MHz clock, my counter
> counts twice when the DDC is set at 100Msps over the duration of the signal
> m_in_payload_tvalid. When m_in_payload_tvalid is in low state, the counter
> stops and then keep counting again when the other CHDR packet comes.
>
>
> Our goal here is count the actual samples or items (according to the RFNoC
> specification).
>
> Thank you so much and let me know your thoughts.
>
>
> Thanks
>
> Julian.
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