On Tue, Apr 27, 2021 at 3:50 PM <[email protected]> wrote: > I went ahead and set high the context_tdata HDR EOB bit field when the sample > counter reaches a value, context_tuser is 0x0 and context_tvalid is high, but > when I read it, UHD rx_metadata_t &metadata end_of_burst, I do not see the > flag comes true. I wonder if this is the way to read and end_of_burst flag.
If you set EOB correctly in your FPGA logic, then you should see it from UHD in the rx metadata. If you don't see it, something must be wrong in the implementation. By the way instead of using "axis_pyld_ctxt" (in the block yml file), have you considered using "axis_data" which uses the "sideband" signals? For many custom blocks, I think this is easier. _______________________________________________ USRP-users mailing list -- [email protected] To unsubscribe send an email to [email protected]
