LGTM.
http://codereview.chromium.org/2878043/diff/1/4 File src/arm/codegen-arm.cc (right): http://codereview.chromium.org/2878043/diff/1/4#newcode6246 src/arm/codegen-arm.cc:6246: // deferred code. It looked like some support for register allocation was being added to ARM. If there ever are registers that need to be saved and restored when going to deferred code, they will be restored when leaving the block, taking more than one instruction. Is there a comment or assert that should be added here, or is this not a likely possibility. http://codereview.chromium.org/2878043/show -- v8-dev mailing list [email protected] http://groups.google.com/group/v8-dev
