Gilles Chanteperdrix wrote:
> Philippe Gerum wrote:
>> Ok. How many interrupt controllers would be impacted by the PIC mute
>> feature?
> Most of the ARM PICs (with their cascaded GPIOs). I have to admit that I
> do not keep track of how many arm processors we actually support, but
> there's a handful. Or maybe two.

We support 9 arm SOCs families.


Xenomai-core mailing list

Reply via email to