Hi, Amontec has developped a VHDL version of the mpsse at 60Mhz max swd jtag spi clock, instead of the actual 30Mhz. We are now adding new commands in our mpsse core for accelerating the swd job.
Next and for coming with SWO we will have two solutions : 1. using the channel B of the ft2232h in uart for getting a direct rx data stream on that channel (as a simple terminal do). Amontec did some tests but it is not so good regarding setup, stability and speed. 2. using the channel A in fifo sync, placing mpsse core in the FPGA and adding some new specific command to enable the SWV rx data stream in uart or manchester style. In this case the received rx data stream should be packeted since we will have both replies from mpsse (JTAG / SWD) and reply from swo stream on the same IN endpoint. Using 2. the 1. is not possible since the actual ft2232h in fifo sync is disabling the Channel B. But the 2. with a good data packaging on RX will make the data flow fast as 40MBytesSec and more elegant ( as a single RX TX implementation ) Any suggestions, idea on the style of packet to use and how/where to unpacket the data stream in the openocd? Anyone know if the other SWO interfaces as j-link u-link new icdi use a supplementary USB IN endpoint for getting this rx data stream or do they use same two endpoints as for the classic JTAG SWD command/ interface. Laurent http://www.amontec.com ------------------------------------------------------------------------------ Master Visual Studio, SharePoint, SQL, ASP.NET, C# 2012, HTML5, CSS, MVC, Windows 8 Apps, JavaScript and much more. Keep your skills current with LearnDevNow - 3,200 step-by-step video tutorials by Microsoft MVPs and experts. ON SALE this month only -- learn more at: http://p.sf.net/sfu/learnmore_122712 _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
