Laurent Gauch wrote:
> Amontec has developped a VHDL version of the mpsse at 60Mhz

Output clock isn't the bottleneck, protocol design is.

I like your initiative to create an open source VHDL design and an
open host protocol for that VHDL. Where is the source code located?

Unless you're publishing your work under a very open license,
effectively making your design open hardware, I don't think that you
will get a lot of help to create the critical part which is actually
the only thing that would be new compared to several existing (open)
implementations.


//Peter

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