Remove all the material related to AIC5 support: this interrupt controller
driver is now implemented in drivers/irqchip/atmel-aic.c.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
arch/arm/mach-at91/irq.c | 270 ++-
1 file
Add new atmel AIC (Advanced Interrupt Controller) driver based on the
generic chip infrastructure.
This driver is only compatible with dt enabled board and replaces the old
implementation found in arch/arm/mach-at91/irq.c.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
kernel, without
any legacy board support).
Remove specific irq init code in all dt board files: this init procedure
is automatically handled in of_irq_init which is called by the arm irq core
code and is in charge of calling the appropriate aic init functions.
Signed-off-by: Boris BREZILLON
Move atmel aic driver doc to the interrupt-controller directory as the new
driver now lays in drivers/irqchip/atmel-aic.c.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
.../devicetree/bindings/arm/atmel-aic.txt | 42 --
.../bindings/interrupt
On 22/06/2014 01:51, Jason Cooper wrote:
On Fri, Jun 20, 2014 at 05:01:21PM +0200, Boris BREZILLON wrote:
Export the generic irq map function in order to provide irq_domain ops with
generic mapping and specific of xlate function (needed by the new atmel
AIC driver).
Signed-off-by: Boris
On 20/06/2014 17:01, Boris BREZILLON wrote:
Add new atmel AIC (Advanced Interrupt Controller) driver based on the
generic chip infrastructure.
This driver is only compatible with dt enabled board and replaces the old
implementation found in arch/arm/mach-at91/irq.c.
Signed-off-by: Boris
On 23/06/2014 15:07, Jason Cooper wrote:
On Sun, Jun 22, 2014 at 09:59:44AM +0200, Boris BREZILLON wrote:
On 22/06/2014 01:51, Jason Cooper wrote:
On Fri, Jun 20, 2014 at 05:01:21PM +0200, Boris BREZILLON wrote:
Export the generic irq map function in order to provide irq_domain ops
On 23/06/2014 19:50, Jason Cooper wrote:
On Mon, Jun 23, 2014 at 05:07:47PM +0200, Boris BREZILLON wrote:
On 23/06/2014 15:07, Jason Cooper wrote:
On Sun, Jun 22, 2014 at 09:59:44AM +0200, Boris BREZILLON wrote:
On 22/06/2014 01:51, Jason Cooper wrote:
On Fri, Jun 20, 2014 at 05:01:21PM
Hello Jason,
On 24/06/2014 14:56, Jason Cooper wrote:
Boris,
On Sun, Jun 22, 2014 at 10:56:54PM +0200, Boris BREZILLON wrote:
On 20/06/2014 17:01, Boris BREZILLON wrote:
Add new atmel AIC (Advanced Interrupt Controller) driver based on the
generic chip infrastructure.
This driver is only
On 20/06/2014 17:01, Boris BREZILLON wrote:
Add new atmel AIC (Advanced Interrupt Controller) driver based on the
generic chip infrastructure.
This driver is only compatible with dt enabled board and replaces the old
implementation found in arch/arm/mach-at91/irq.c.
Signed-off-by: Boris
to READID informations (by storing
some sort of NANDID - timings association table).
Best Regards,
Boris
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Embedded Linux and Kernel engineering
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the body
Hello Thierry,
I haven't had any feedback from you on this pretty straightforward
patch series adding support for a new LCD panel.
Did you receive it in the first place ?
Best Regards,
Boris
On Thu, 5 Jun 2014 15:53:30 +0200
Boris BREZILLON boris.brezil...@free-electrons.com wrote:
Hello
between these files.
Regarding the readability concern, I think some comments could help
understanding what's being done here.
Best Regards,
Boris
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y defaut for platforms supporting the hlcdc.
After taking a closer look at other drivers, it seems most of sub
drivers depends on the MFD driver, so, unless other people complain
about that, I'll keep this definition.
Lee, any opinion on this point ?
Best Regards,
Boris
--
Boris Brezillon
-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
.../devicetree/bindings/drm/atmel-hlcdc-dc.txt | 59 ++
1 file changed, 59 insertions(+)
create mode 100644 Documentation/devicetree/bindings/drm/atmel-hlcdc-dc.txt
diff --git a/Documentation/devicetree/bindings/drm
The HLCDC IP available in some Atmel SoCs (i.e. sam9x5i.e. at91sam9n12,
at91sam9x5 family or sama5d3 family) provide a PWM device.
The DT bindings used for this PWM device is following the default 3 cells
bindings described in Documentation/devicetree/bindings/pwm/pwm.txt.
Signed-off-by: Boris
Define the HLCDC (HLCD Controller) IP available on some sama5d3 SoCs
(i.e. sama5d31, sama5d33, sama5d34 and sama5d36) in sama5d3 dtsi file.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/sama5d3_lcd.dtsi | 20
1 file changed, 20
The HLCDC IP available in some Atmel SoCs (i.e. sam9x5i.e. at91sam9n12,
at91sam9x5 family or sama5d3 family) provide a PWM device.
This driver add support for a PWM chip exposing a single PWM device (which
will most likely be used to drive a backlight device).
Signed-off-by: Boris BREZILLON
Define alternative pin muxing for the LCDC pins.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/sama5d3_lcd.dtsi | 50 ++
1 file changed, 50 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d3_lcd.dtsi
b/arch/arm
The HLCDC (HLCD Controller) IP supports 4 different output mode (RGB444,
RGB565, RGB666 and RGB888) and the pin muxing will depend on the chosen
RGB mode.
Split pin definitions to be able to set pin config according to the
selected mode.
Signed-off-by: Boris BREZILLON boris.brezil...@free
Enable LCD related nodes and reference panel node in the hlcdc (HLCD
Controller) node.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/sama5d31ek.dts | 24
arch/arm/boot/dts/sama5d33ek.dts | 24
arch/arm
Add LCD panel related nodes (backlight, regulators and panel) to sama5d3
Display Module dtsi.
Reference LCD pin muxing used by sama5d3xek boards.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/sama5d3xdm.dtsi | 43
The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5
family or sama5d3 family) exposes 2 subdevices:
- a display controller (controlled by a DRM driver)
- a PWM chip
This patch adds documentation for atmel-hlcdc DT bindings.
Signed-off-by: Boris BREZILLON boris.brezil...@free
.
This way concurrent accesses to the iomem range are handled by the regmap
framework, and each subdevice can safely access HLCDC registers.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
drivers/mfd/Kconfig | 12
drivers/mfd/Makefile| 1
of drm_panel infrastructure
- split driver code in several subsystem: MFD, PWM and DRM
- add support for overlays
- add support for hardware cursor
Boris BREZILLON (11):
mfd: add atmel-hlcdc driver
mfd: add documentation for atmel-hlcdc DT bindings
pwm: add support for atmel-hlcdc-pwm device
-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
.../devicetree/bindings/drm/atmel-hlcdc-dc.txt | 59 ++
1 file changed, 59 insertions(+)
create mode 100644 Documentation/devicetree/bindings/drm/atmel-hlcdc-dc.txt
diff --git a/Documentation/devicetree/bindings/drm
Define the HLCDC (HLCD Controller) IP available on some sama5d3 SoCs
(i.e. sama5d31, sama5d33, sama5d34 and sama5d36) in sama5d3 dtsi file.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/sama5d3_lcd.dtsi | 20
1 file changed, 20
Add LCD panel related nodes (backlight, regulators and panel) to sama5d3
Display Module dtsi.
Reference LCD pin muxing used by sama5d3xek boards.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/sama5d3xdm.dtsi | 43
Enable LCD related nodes and reference panel node in the hlcdc (HLCD
Controller) node.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/sama5d31ek.dts | 24
arch/arm/boot/dts/sama5d33ek.dts | 24
arch/arm
The HLCDC IP available in some Atmel SoCs (i.e. sam9x5i.e. at91sam9n12,
at91sam9x5 family or sama5d3 family) provide a PWM device.
This driver add support for a PWM chip exposing a single PWM device (which
will most likely be used to drive a backlight device).
Signed-off-by: Boris BREZILLON
The HLCDC (HLCD Controller) IP supports 4 different output mode (RGB444,
RGB565, RGB666 and RGB888) and the pin muxing will depend on the chosen
RGB mode.
Split pin definitions to be able to set pin config according to the
selected mode.
Signed-off-by: Boris BREZILLON boris.brezil...@free
The HLCDC IP available in some Atmel SoCs (i.e. sam9x5i.e. at91sam9n12,
at91sam9x5 family or sama5d3 family) provide a PWM device.
The DT bindings used for this PWM device is following the default 3 cells
bindings described in Documentation/devicetree/bindings/pwm/pwm.txt.
Signed-off-by: Boris
.
This way concurrent accesses to the iomem range are handled by the regmap
framework, and each subdevice can safely access HLCDC registers.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
drivers/mfd/Kconfig | 12
drivers/mfd/Makefile| 1
:
- replace the backlight driver by a PWM driver
- make use of drm_panel infrastructure
- split driver code in several subsystem: MFD, PWM and DRM
- add support for overlays
- add support for hardware cursor
Boris BREZILLON (11):
mfd: add atmel-hlcdc driver
mfd: add documentation for atmel-hlcdc
Define alternative pin muxing for the LCDC pins.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/sama5d3_lcd.dtsi | 50 ++
1 file changed, 50 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d3_lcd.dtsi
b/arch/arm
Hi Brian,
On Mon, 7 Jul 2014 16:52:22 -0700
Brian Norris computersforpe...@gmail.com wrote:
Hi Boris,
On Thu, Jul 03, 2014 at 10:05:22AM +0200, Boris BREZILLON wrote:
On Wed, 2 Jul 2014 17:22:37 -0700 Brian Norris
computersforpe...@gmail.com wrote:
On Wed, May 28, 2014 at 10:20:05AM
there were some work in progress on this
topic, but didn't know it was planned for 3.17.
I'll move to this solution.
Thanks,
Boris
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Hi Laurent,
On Thu, 10 Jul 2014 13:16:21 +0200
Laurent Pinchart laurent.pinch...@ideasonboard.com wrote:
Hi Boris,
Thank you for the patch.
On Monday 07 July 2014 18:42:59 Boris BREZILLON wrote:
The Atmel HLCDC (HLCD Controller) IP available on some Atmel SoCs (i.e.
at91sam9n12
bindings
Boris BREZILLON (7):
genirq: generic chip: export irq_map_generic_chip function
irqchip: atmel-aic: move binding doc to interrupt-controller directory
irqchip: atmel-aic: Add atmel AIC/AIC5 drivers
ARM: at91: introduce OLD_IRQ_AT91 Kconfig option
ARM: at91: enclose at91_aic_xx calls
kernel, without
any legacy board support).
Remove specific irq init code in all dt board files: this init procedure
is automatically handled in of_irq_init which is called by the arm irq core
code and is in charge of calling the appropriate aic init functions.
Signed-off-by: Boris BREZILLON
Remove all the material related to AIC5 support: this interrupt controller
driver is now implemented in drivers/irqchip/atmel-aic.c.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
---
arch/arm/mach-at91/irq.c | 270
implementation found in arch/arm/mach-at91/irq.c.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
---
drivers/irqchip/Kconfig| 14 ++
drivers/irqchip/Makefile | 2 +
drivers/irqchip/irq-atmel-aic
no longer exposes the at91_aic_base variable
which is used by the at91_aic_read functions.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
---
arch/arm/mach-at91/pm.c| 32
arch/arm/mach-at91/setup.c
Export the generic irq map function in order to provide irq_domain ops with
generic mapping and specific of xlate function (needed by the new atmel
AIC driver).
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
Acked-by: Thomas Gleixner t...@linutronix.de
---
include/linux/irq.h
Move atmel aic driver doc to the interrupt-controller directory as the new
driver now lays in drivers/irqchip/atmel-aic.c.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
---
.../bindings/{arm/atmel-aic.txt = interrupt-controller
-by: Boris BREZILLON boris.brezil...@free-electrons.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
---
arch/arm/mach-at91/Kconfig| 17 +
arch/arm/mach-at91/Kconfig.non_dt | 6 ++
arch/arm/mach-at91/Makefile | 3 ++-
3 files changed, 17 insertions(+), 9 deletions
On Thu, 10 Jul 2014 08:35:15 -0700
Florian Fainelli f.faine...@gmail.com wrote:
2014-07-10 2:07 GMT-07:00 Boris BREZILLON
boris.brezil...@free-electrons.com:
On Fri, 27 Jun 2014 09:52:56 +0200
Nicolas Ferre nicolas.fe...@atmel.com wrote:
On 26/06/2014 22:01, Boris BREZILLON :
Hi
On Thu, 10 Jul 2014 19:14:15 +0200
Boris BREZILLON boris.brezil...@free-electrons.com wrote:
Hello,
This series moves the AIC driver to the irqchip directory and make use of
the generic chip framework whenever possible.
This driver only support DT boards (all legacy board files should
On Thu, 10 Jul 2014 10:46:21 -0700
Florian Fainelli f.faine...@gmail.com wrote:
2014-07-10 10:19 GMT-07:00 Boris BREZILLON
boris.brezil...@free-electrons.com:
On Thu, 10 Jul 2014 08:35:15 -0700
Florian Fainelli f.faine...@gmail.com wrote:
2014-07-10 2:07 GMT-07:00 Boris BREZILLON
These board specific delays are now configured through micrel's specific
DT bindings (see Documentation/devicetree/bindings/net/micrel-ksz9021.txt).
Remove this phy fixup registration from sama5 DT machine file to keep it
as generic as possible.
Signed-off-by: Boris BREZILLON boris.brezil
file.
Best Regards,
Boris
Changes since v2:
- define 2 phy nodes to handle Ronetix and Embest HW designs
Changes since v1:
- fix txc-skew-ps and rxc-skew-ps delays
- remove phy address info to handle Ronetix and Embest HW designs
Boris BREZILLON (2):
ARM: at91/dt: describe rgmii ethernet
) is connecting PHYAD0 to a pull up
resistor and PHYAD[1-2] to pull down resistors.
As a result, Ronetix design will have its PHY available at address 0x1 and
Embest design at 0x7.
By defining both phys we're letting the phy core detect the one actually
available on the MDIO bus.
Signed-off-by: Boris
On Fri, 11 Jul 2014 14:00:25 +0200
Boris BREZILLON boris.brezil...@free-electrons.com wrote:
On Fri, 11 Jul 2014 12:37:46 +0200
Laurent Pinchart laurent.pinch...@ideasonboard.com wrote:
Hi Boris,
On Thursday 10 July 2014 14:56:26 Boris BREZILLON wrote:
On Thu, 10 Jul 2014 13:16:21
On Mon, 14 Jul 2014 11:08:14 +0800
Bo Shen voice.s...@atmel.com wrote:
Correct the typo error for the second uhphs_clk.
Signed-off-by: Bo Shen voice.s...@atmel.com
Acked-by: Boris Brezillon boris.brezil...@free-electrons.com
sam9n12 dtsi has the same bug, I'll fix it
And sorry for the mess
Hello Thierry,
On Mon, 14 Jul 2014 12:05:43 +0200
Thierry Reding thierry.red...@gmail.com wrote:
On Mon, Jul 07, 2014 at 06:42:59PM +0200, Boris BREZILLON wrote:
The Atmel HLCDC (HLCD Controller) IP available on some Atmel SoCs (i.e.
at91sam9n12, at91sam9x5 family or sama5d3 family
On Sat, 12 Jul 2014 14:37:16 -0400
Rob Clark robdcl...@gmail.com wrote:
On Sat, Jul 12, 2014 at 2:16 PM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote:
Hello,
On Mon, 7 Jul 2014 18:42:58 +0200
Boris BREZILLON boris.brezil...@free-electrons.com wrote:
+int
On Mon, 14 Jul 2014 12:18:08 +0200
Thierry Reding thierry.red...@gmail.com wrote:
On Fri, Jul 11, 2014 at 02:00:25PM +0200, Boris BREZILLON wrote:
On Fri, 11 Jul 2014 12:37:46 +0200 Laurent Pinchart
laurent.pinch...@ideasonboard.com wrote:
On Thursday 10 July 2014 14:56:26 Boris
:
On Tuesday 15 July 2014 12:06:19 Boris BREZILLON wrote:
On Mon, 14 Jul 2014 12:05:43 +0200 Thierry Reding wrote:
On Mon, Jul 07, 2014 at 06:42:59PM +0200, Boris BREZILLON wrote:
The Atmel HLCDC (HLCD Controller) IP available on some Atmel SoCs
(i.e. at91sam9n12, at91sam9x5 family
Add DT definitions for PRCM (Power/Reset/Clock Management) clock and reset
controller subdevices.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/sun6i-a31.dtsi | 49
1 file changed, 49 insertions(+)
diff --git
devices instead of registered during early init.
We need this to be able to probe PRCM MFD subdevices.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
drivers/clk/sunxi/Makefile | 2 +
drivers/clk/sunxi/clk-sun6i-prcm.c | 253
Document new compatible strings for clock provided by the PRCM
(Power/Reset/Clock Management) unit.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
Documentation/devicetree/bindings/clock/sunxi.txt | 6 ++
1 file changed, 6 insertions(+)
diff --git a/Documentation
Document DT bindings of the PRCM (Power/Reset/Clock Management) unit.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
.../devicetree/bindings/mfd/sun6i-prcm.txt | 71 ++
1 file changed, 71 insertions(+)
create mode 100644 Documentation
.
Moreover, we can make use of devm functions when we're in probe context.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
drivers/reset/reset-sunxi.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/reset/reset-sunxi.c b
100644
index 000..e05d92d
--- /dev/null
+++ b/drivers/mfd/sun6i-prcm.c
@@ -0,0 +1,163 @@
+/*
+ * Copyright (C) 2014 Free Electrons
+ *
+ * License Terms: GNU General Public License v2
+ * Author: Boris BREZILLON boris.brezil...@free-electrons.com
+ *
+ * Allwinner PRCM (Power/Reset/Clock
Add DT bindings documentation for sunxi's reset controllers.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
.../bindings/reset/allwinner,sunxi-clock-reset.txt | 21 +
1 file changed, 21 insertions(+)
create mode 100644
Documentation/devicetree
Boris BREZILLON (7):
reset: sunxi: document sunxi's reset controllers bindings
reset: sunxi: allow MFD subdevices probe
mfd: add support for sun6i PRCM (Power/Reset/Clock Management) unit
mfd: sun6i-prcm: document DT bindings
clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support
On 28/04/2014 17:25, Emilio López wrote:
Hi Boris,
El 28/04/14 11:58, Boris BREZILLON escribió:
The PRCM (Power/Reset/Clock Management) unit provides several clock
devices:
- AR100 clk: used to clock the Power Management co-processor
- AHB0 clk: used to clock the AHB0 bus
- APB0 clk
On 28/04/2014 18:02, Chen-Yu Tsai wrote:
Hi,
On Mon, Apr 28, 2014 at 10:58 PM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote:
Add DT definitions for PRCM (Power/Reset/Clock Management) clock and reset
controller subdevices.
Signed-off-by: Boris BREZILLON boris.brezil...@free
On 28/04/2014 20:03, Chen-Yu Tsai wrote:
On Tue, Apr 29, 2014 at 1:14 AM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote:
Hi Chen-Yu,
On 28/04/2014 17:59, Chen-Yu Tsai wrote:
Hi,
On Mon, Apr 28, 2014 at 10:58 PM, Boris BREZILLON
boris.brezil...@free-electrons.com wrote
working on the same page.
The randomizer layer provides helper functions that choose wether the
randomizer or the chip read/write_buf should be used.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
drivers/mtd/nand/nand_base.c | 280 ++-
include
://groups.google.com/forum/#!msg/linux-sunxi/s3lBb01I0Js/z2NoCFJ83g4J
Boris BREZILLON (3):
mtd: nand: introduce a randomizer layer in the NAND framework
of: mtd: add NAND randomizer mode retrieval
mtd: nand: add sunxi randomizer support
drivers/mtd/nand/nand_base.c | 278
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
drivers/of/of_mtd.c| 35 +++
include/linux/of_mtd.h | 6 ++
2 files changed, 41 insertions(+)
diff --git a/drivers/of/of_mtd.c b/drivers/of/of_mtd.c
index a862c08..f941a5e 100644
--- a/drivers
Add support for the HW randomizer available in the sunxi IP.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
drivers/mtd/nand/sunxi_nand.c | 511 +-
1 file changed, 500 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/nand/sunxi_nand.c
On 01/05/2014 15:16, Grant Likely wrote:
On Thu, 1 May 2014 03:09:51 +0200, Boris BREZILLON
b.brezillon@gmail.com wrote:
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
No commit message? Immediate NAK. Please, make sure you write a
description for each and every patch
On 01/05/2014 18:34, Jason Gunthorpe wrote:
On Thu, May 01, 2014 at 03:09:49AM +0200, Boris BREZILLON wrote:
Hello,
This series is a proposal to add support for randomizers (either software
or hardware) to NAND flash controller drivers.
FWIW, I think the term for reversibly combining a PRBS
Hi Brian,
On 30/04/2014 19:51, Brian Norris wrote:
Hi Boris,
On Wed, Mar 12, 2014 at 07:07:36PM +0100, Boris BREZILLON wrote:
+
+/**
+ * struct nand_sdr_timings - SDR NAND chip timings
+ *
+ * This struct defines the timing requirements of a SDR NAND chip.
+ * These informations can
On 01/05/2014 19:59, Jason Gunthorpe wrote:
On Thu, May 01, 2014 at 07:31:13PM +0200, Boris BREZILLON wrote:
I totally agree with you, this is not a randomizer but rather a scrambler.
The reason I chose the randomizer word is that all the documents I
read are talking about randomizers
families) the multiplexer source is
hardcoded to the external crystal oscillator.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
Changes since v3:
- add IGNORE_UNUSED flags to main osc clks
drivers/clk/at91/clk-main.c | 577
.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
Changes since v3:
- add IGNORE_UNUSED flags to slow osc clks
drivers/clk/at91/Makefile| 4 +-
drivers/clk/at91/clk-slow.c | 467 +++
drivers/clk/at91/pmc.c | 5 +
drivers
On 29/04/2014 01:40, Maxime Ripard wrote:
On Mon, Apr 28, 2014 at 04:58:48PM +0200, Boris BREZILLON wrote:
The PRCM (Power/Reset/Clock Management) unit provides several clock
devices:
- AR100 clk: used to clock the Power Management co-processor
- AHB0 clk: used to clock the AHB0 bus
- APB0
.
Moreover, we can make of devm functions when we're in the probe context.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
drivers/reset/reset-sunxi.c | 21 ++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/drivers/reset/reset-sunxi.c b
Add DT definitions for PRCM (Power/Reset/Clock Management) clock and reset
controller subdevices.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/sun6i-a31.dtsi | 39 ++-
1 file changed, 38 insertions(+), 1 deletion
Document DT bindings of the PRCM (Power/Reset/Clock Management) unit.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
.../devicetree/bindings/mfd/sun6i-prcm.txt | 59 ++
1 file changed, 59 insertions(+)
create mode 100644 Documentation
mode 100644
index 000..0156bcb
--- /dev/null
+++ b/drivers/mfd/sun6i-prcm.c
@@ -0,0 +1,151 @@
+/*
+ * Copyright (C) 2014 Free Electrons
+ *
+ * License Terms: GNU General Public License v2
+ * Author: Boris BREZILLON boris.brezil...@free-electrons.com
+ *
+ * Allwinner PRCM (Power/Reset/Clock
Document new compatible strings for clock provided by the PRCM
(Power/Reset/Clock Management) unit.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
Documentation/devicetree/bindings/clock/sunxi.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation
Add DT bindings documentation for sunxi's reset controllers.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
.../bindings/reset/allwinner,sunxi-clock-reset.txt | 21 +
1 file changed, 21 insertions(+)
create mode 100644
Documentation/devicetree
so that they can be probed
as platform devices instead of registered during early init.
This is needed to be able to probe PRCM MFD subdevices.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
drivers/clk/sunxi/Makefile | 2 +
drivers/clk/sunxi/clk-sun6i-prcm.c | 343
return check
- rework the macro definitions
- fix typos
[1] http://www.spinics.net/lists/linux-i2c/msg15066.html
[2] http://comments.gmane.org/gmane.comp.hardware.netbook.arm.sunxi/8947
Boris BREZILLON (2):
i2c: sunxi: add P2WI DT bindings documentation
i2c: sunxi: add P2WI (Push/Pull 2 Wire
P2WI (Push/Pull 2 Wire Interface) is an SMBus like bus used to communicate
with some PMICs (like the AXP221).
Document P2WI DT bindings which are pretty much the same as the one defined
for the marvell's mv64xxx controller.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
.
+ *
+ * Author: Boris BREZILLON boris.brezil...@free-electrons.com
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed as is without any warranty of any
+ * kind, whether express or implied.
+ */
+#include linux/kernel.h
later (if needed).
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
drivers/mfd/Kconfig | 8 +++
drivers/mfd/Makefile | 1 +
drivers/mfd/sun6i-prcm.c | 151
+++
3 files changed, 160 insertions(+)
create mode
On 08/05/2014 05:07, Maxime Ripard wrote:
On Wed, May 07, 2014 at 07:25:49PM +0200, Boris BREZILLON wrote:
The current implementation uses sunxi_reset_init function for both early
init and platform device probe.
The sunxi_reset_init function uses DT to retrieve device resources, which
sun6i code uses r_tmr or just tmr. I see no problem naming this
clock output as apb0_timer though.
Yep, it seems better.
Fair enough, I'll change the name for the next version.
Maxime
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
mfd_remove_devices() then?
No, this is an integral part of the SOC, which never gets removed in any way.
Lee, I'm about to send a 3rd version of this series, is it okay for you
if I leave the remove function unimplemented ?
Regards,
Hans
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel
-by: Boris Brezillon boris.brezil...@free-electrons.com
Best Regards,
Boris
-
};
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line unsubscribe devicetree in
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Add DT bindings documentation for sunxi's reset controllers.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
Acked-by: Maxime Ripard maxime.rip...@free-electrons.com
---
.../bindings/reset/allwinner,sunxi-clock-reset.txt | 21 +
1 file changed, 21
calls from sunxi_reset_remove function
- rework the AR100 clk implementation
Boris BREZILLON (7):
reset: sunxi: document sunxi's reset controllers bindings
reset: sunxi: allow MFD subdevices probe
mfd: add support for sun6i PRCM (Power/Reset/Clock Management) unit
mfd: sun6i-prcm: document
later (if needed).
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
Acked-by: Maxime Ripard maxime.rip...@free-electrons.com
---
drivers/mfd/Kconfig | 8 +++
drivers/mfd/Makefile | 1 +
drivers/mfd/sun6i-prcm.c | 134
chose this approach ?
Best Regards,
Boris
Boris BREZILLON (2):
drm/panel: add support for simple-panel description definition using
DT
drm/panel: update simple-panel DT bindings doc with panel desc
properties
.../devicetree/bindings/panel/simple-panel.txt | 34
Currently, the only way to add new panel descriptions to the simple panel
driver is to add new entries in the platform_of_match table.
Add support for panel description retrieval from the DT.
Signed-off-by: Boris BREZILLON boris.brezil...@free-electrons.com
---
drivers/gpu/drm/panel/Kconfig
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