Hello.
Mark Lord wrote:
Bit #4, when actually implemented, is a rotational seek indicator,
which can be used for timing purposes.
Hm, I thought it was DSC (drive seek complete) set by the SEEK command
completion, and it's always implemented. Didn't you mean IDX (bit 1, IIRC)?
But when
Hello.
Eric D. Mudama wrote:
Bit #4, when actually implemented, is a rotational seek indicator,
which can be used for timing purposes.
Hm, I thought it was DSC (drive seek complete) set by the SEEK
command
completion, and it's always implemented. Didn't you mean IDX (bit 1,
IIRC)?
Hello.
Alan wrote:
I believe this is completely the wrong thing to do. Adding a ton of
changes to the existing (and stable) life expired drivers/ide driver
rather than keeping new and risky stuff in the new libata code is bad.
The new and risky stuff is long agon in there.
The existing
Olaf Hering wrote:
The printk in pci_request_region has 'bar + 1', so 6 should be possible
if i becomes 5.
Does the IO region of the last bar look correct?
I'd say it looks suspicious since it's not adjacent to all the other
regions... In fact, after looking at your /proc/ioports/ I
Hello.
Sergei Shtylyov wrote:
I believe this is completely the wrong thing to do. Adding a ton of
changes to the existing (and stable) life expired drivers/ide driver
rather than keeping new and risky stuff in the new libata code is bad.
The new and risky stuff is long agon
Hello.
Segher Boessenkool wrote:
Please make this run on pSeries only; on a PowerMac for
example, it's totally normal that the first PCI legacy I/O
BAR in the system gets assigned 0.
What do you mean by legacy I/O BAR?
Any PCI BAR with bits 1:0 == 0b01.
If you mean IDE controller,
Hello.
Alan wrote:
W82C105_IDE: inconsistent baseregs (BIOS) for port 0, skipping
So that needs fixing too, then.
Both PCI core and IDE interpret a zero length resource as unassigned.
This is not about 0-length resource, this is about 0-address. Look at
ide_hwif_confiure() in
Hello.
Alan wrote:
When Linus remaps IRQ0 on x86, I'll follow that code as a testament. Until
this happens, I consider is just an opinion. Forcing every arch but x86 to
remap IRQ0 is an example of the double standards.
Yawn.. x86 does not expose IRQ 0 outside of arch specific code.
Hello.
Gabriel Paubert wrote:
On Mon, 2006-12-04 at 14:22 +, Alan wrote:
The discussion I was having was about sl82cxx and handling unassigned
resources. The zero address isn't relevant to that.
Well, actually, it's unclear to me wether the resource is unassigned or
has been assigned
Hello.
Grant Grundler wrote:
Well, I don't have the PCI specification, but I have a device with the
Try googling for pdf21.pdf, pdf22.pdf if you need it. :-)
I think you meant pci21.pdf/pci22.pdf/pci23.pdf.
And if you find them, trust me when I say whoever is hosting those files
can
Hello.
Benjamin Herrenschmidt wrote:
On Tue, Dec 05, Benjamin Herrenschmidt wrote:
Olaf, can you give me a dump of /proc/ioports ? What is sitting at 0 on
that PCI bus ?
with IDE=y
== /proc/ioports ==
-001f : dma1
So it's indeed colliding with the cruft above.
I
-by: Sergei Shtylyov [EMAIL PROTECTED]
---
This code has been successfully tested by me on PDC2026[89] chips.
I tried to keep this rework as several patches but it made no sense: [2] was
largely a modification of the non-working timing override code, [3] by itself
extended the overclocking issue
Hello.
On Wednesday 13 December 2006 01:48, Sergei Shtylyov wrote:
Behold! This is the driver for the Toshiba TC86C001 GOKU-S IDE controller,
completely reworked from the original brain-damaged Toshiba's 2.4 version.
Shoot, the patch is actually against the most recent Linus' tree, so
it's
)...
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
drivers/ide/Kconfig|5
drivers/ide/pci/Makefile |1
drivers/ide/pci/tc86c001.c | 304 +
drivers/pci/quirks.c | 18 ++
include/linux/pci_ids.h|1
5 files changed, 329
in it. The particularly nasty
limitation 5 (as they call the errata) caused me to abuse the IDE core in a
possibly most interesting way so far. However, this is still better than the
#ifdef mess in drivers/ide/ide-io.c that the original version included (well,
it had much more mess)...
Signed-off-by: Sergei
Hello.
Adrian Bunk wrote:
+toshiba-tc86c001-ide-driver-take-2.patch
This patch makes the needlessly global init_hwif_tc86c001() static.
Duh, I hoped tha this driver may get into 2.6.20-rc1 and finally
overlooked this. Sigh, uou won't believe how much time this driver rewrite
spent in
Hello.
Adrian Bunk wrote:
This patch makes the needlessly global init_hwif_tc86c001() static.
Signed-off-by: Adrian Bunk [EMAIL PROTECTED]
If this patch hasn't been accepted by Andrew yet, could you add another
fixlet: init_chipset_tc86c001() should've been __devinit. If not or it's
to ide_get_best_pio_mode();
- use min_t() macro instead of min();
- simplify slave vs master drive evaluation;
- do come coding and formatting cleanups...
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
drivers/ide/pci/piix.c | 21 ++---
1 files changed, 10 insertions(+), 11 deletions(-)
Index
for other MW/SW DMA modes;
- don't check dor non-NULL drive-id in the ide_dma_check() method -- this is
assumed to be true in all other drivers;
- do some coding/formatting cleanups while at it...
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
drivers/ide/pci/slc90e66.c | 55
* correspond to a higher frequency, i. e. it
should be 5 for 25 MHz PCI and 9 for 40 MHz PCI, not the other way around.
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
drivers/ide/pci/hpt366.c |8 ++--
1 files changed, 6 insertions(+), 2 deletions(-)
Index: linux-2.6/drivers/ide/pci
Michael Bueker wrote:
In the controller's setup utility, I can choose access modes. If i
switch it from UDMA5 to PIO0, the only difference during boot is:
PIO0 is outrageously slow, use PIO4 (very slow as well but at least
somewhat faster). Anyway, this won't help with Linux...
Hello.
Michael Bueker wrote:
Have you looked at changes to drivers/ide/pci/hpt366.c?
The code is not the same, there are a lot of fixes in -mm:
hpt3xx-rework-rate-filtering.patch
hpt3xx-rework-rate-filtering-tidy.patch
hpt3xx-print-the-real-chip-name-at-startup.patch
Hello.
Alan wrote:
Alan/Bart/anybody, could you enlighten me why hwif-rw_disk() method came
into being at all?
When you needed to wrap entire disk operations. The -dma_ methods only
wrap DMA commands.
Yeah, good point. But it's not likely that the HighPoint driver actually
needs
Hello.
Alan wrote:
Alan/Bart/anybody, could you enlighten me why hwif-rw_disk() method came
into being at all?
When you needed to wrap entire disk operations. The -dma_ methods only
wrap DMA commands.
BTW, I've looked at the clock turnaround code both in drivers/ide/hpt366.c
and
Hello.
Bartlomiej Zolnierkiewicz wrote:
[PATCH] ide: update MAINTAINERS entry
Signed-off-by: Bartlomiej Zolnierkiewicz [EMAIL PROTECTED]
---
MAINTAINERS |7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
Index: my-2.6/MAINTAINERS
Hello.
Bartlomiej Zolnierkiewicz wrote:
[PATCH] ide: disable DMA in -ide_dma_check for no IORDY case
I've looked thru the code, and found more issues with the PIO fallback
there. Will try to cook up patches for at least some drivers...
Signed-off-by: Bartlomiej Zolnierkiewicz [EMAIL
Fix the driver's tuneproc() method to always set the PIO mode requested and not
pick the best possible one, rename it to pdc202xx_tune_drive(), and change the
calls to it accordingly; remove the preceding comment which has nothing to do
with the code.
Signed-off-by: Sergei Shtylyov [EMAIL
Hello.
Bartlomiej Zolnierkiewicz wrote:
I've looked thru the code, and found more issues with the PIO fallback
there. Will try to cook up patches for at least some drivers...
Great, if possible please base them on top of the IDE tree...
Erm, I had doubts about it (having in mind that
Hello.
Bartlomiej Zolnierkiewicz wrote:
The other advantage of doing cleanups is that code becomes cleaner/simpler
which matters a lot for this codebase, i.e. ide-dma-off-void.patch exposed
(yet to be fixed) bug in set_using_dma() (-ide_dma_off_quietly always returns
0 which is passed by
Hello again. :-)
Bartlomiej Zolnierkiewicz wrote:
[PATCH] ide: add ide_set_dma() helper
* add ide_set_dma() helper and make ide_hwif_t.ide_dma_check return
-1 when DMA needs to be disabled (== need to call -ide_dma_off_quietly)
0 when DMA needs to be enabled (== need to call
Hello again. :-)
Bartlomiej Zolnierkiewicz wrote:
[PATCH] ide: make ide_hwif_t.ide_dma_host_on void
* since ide_hwif_t.ide_dma_host_on is called either when drive-using_dma == 1
or when return value is discarded make it void, also drop ide_ prefix
* make __ide_dma_host_on() void and drop
Hello.
Bartlomiej Zolnierkiewicz wrote:
[PATCH] ide: fix UDMA/MWDMA/SWDMA masks
* use 0x00 instead of 0x80 to disable -{ultra,mwdma,swdma}_mask
* add udma_mask field to ide_pci_device_t and use it to initialize
-ultra_mask in aec62xx, pdc202xx_new and pdc202xx_old drivers
* fix UDMA masks
Hello.
Bartlomiej Zolnierkiewicz wrote:
[PATCH] ide: rework the code for selecting the best DMA transfer mode
Here's another portion of comments...
Depends on the ide: fix UDMA/MWDMA/SWDMA masks patch.
* add ide_hwif_t.filter_udma_mask hook for filtering UDMA mask
Erm, maybe a
Hello.
Alan wrote:
Ugh, I'm not seeing any *actual* support for MW/SW DMA in this driver...
Thats long been broken. Should be correct in the libata driver
Here's a surprise for you. pata_cmd64x copied the SW/MW DMA setup code
from the IDE driver. No way it could be working. You
Hello.
Alan wrote:
Ugh, I'm not seeing any *actual* support for MW/SW DMA in this driver...
Thats long been broken. Should be correct in the libata driver
Here's a surprise for you. pata_cmd64x copied the SW/MW DMA setup code
from the IDE driver. No way it could be working. You may
Hello.
Albert Lee wrote:
patch 2/2:
Do the dma status clearing in ide_intr() and add a new
hwif-ide_dma_clear_irq such that LLDD could override it.
Signed-off-by: Albert Lee [EMAIL PROTECTED]
---
Tested ok on ICH4 and pdc20275. Not sure if this would have bad effect for
other adapters.
Alan wrote:
PIO xfermask limits should be shared by all devices on the same
channel to avoid violating device selection timing. libata used to
This is not a good way to deal with this. Only command block (8-bit)
timings should be the same for both drives on channel, data register
Hello.
Alan wrote:
Not really, at least not all drivers. Namely, hpt366.c (still) doesn't
merge 8-bit timings (maybe this is handled in hardware but the datasheets
don't tell about it then) -- I need to look at fixing this... Well, it was
I've never been able to find out - but HPT's
Albert Lee wrote:
patch 2/2 (revised):
- Do the dma status clearing in ide_intr() and add a new
hwif-ide_dma_clear_irq such that LLDD can override it.
- Fix drive-waiting_for_dma to work with CDB-intr devices.
Signed-off-by: Albert Lee [EMAIL PROTECTED]
---
hwif-dma is not reliable: ide_intr()
Hello.
Sergei Shtylyov wrote:
diff -Nrup 01_remove_from_ide_cd/drivers/ide/ide-cd.c
02_add_to_ide_intr/drivers/ide/ide-cd.c
--- 01_remove_from_ide_cd/drivers/ide/ide-cd.c2007-01-24 11:00:03.0
+0800
+++ 02_add_to_ide_intr/drivers/ide/ide-cd.c2007-01-25 16:52:20.0
Hello.
Sergei Shtylyov wrote:
Not a suprise to be honest. I fixed some of the ALi stuff when I did it
and I think that was pushed back into drivers/ide. The CMD64x hasn't had
much love really.
Another buglet found by random glancing at this driver:
/**
* cmd648_dma_stop
Hello.
Bartlomiej Zolnierkiewicz wrote:
The other advantage of doing cleanups is that code becomes cleaner/simpler
which matters a lot for this codebase, i.e. ide-dma-off-void.patch exposed
(yet to be fixed) bug in set_using_dma() (-ide_dma_off_quietly always returns
0 which is passed by
Fix PIO mode 1 overclocked taskfile transfers -- probably a typo carried over
from drivers/ide/pci/siimage.c where I've found it by documentation check...
drivers/ata/pata_sil680.c |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: linux-2.6/drivers/ata/pata_sil680.c
Hello.
Sergei Shtylyov wrote:
Fix PIO mode 1 overclocked taskfile transfers -- probably a typo carried over
from drivers/ide/pci/siimage.c where I've found it by documentation check...
drivers/ata/pata_sil680.c |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: linux-2.6
Fix PIO mode 1 overclocked taskfile transfers -- probably a typo carried over
from drivers/ide/pci/siimage.c where I've found it by documentation check...
drivers/ata/pata_sil680.c |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
Index
Hello.
Alan wrote:
I looked into fixing this but had a feeling that the thing wasn't right
from the very start, including ata_pio_need_iordy(). In my understanding of
the ANSI T13 stadrads, when one issues Set Features subcommand Set Transfer
Mode with sector count register of 0x8 thru
and trailing whitespace in enclosing statements while at it...
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
drivers/ide/pci/siimage.c | 59 ++
1 files changed, 29 insertions(+), 30 deletions(-)
Index: linux-2.6/drivers/ide/pci/siimage.c
coding style and trailing whitespace in enclosing statements while at it...
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
Forgot to specify that this patch was against Linus' tree...
MBR, Sergei
-
To unsubscribe from this list: send the line unsubscribe linux-ide in
the body of a message
Hello.
Albert Lee wrote:
patch 2/2 (revised):
- Fix drive-waiting_for_dma to work with CDB-intr devices.
- Do the dma status clearing in ide_intr() and add a new
hwif-ide_dma_clear_irq for Intel controllers.
Signed-off-by: Albert Lee [EMAIL PROTECTED]
---
Calling hwif-ide_dma_clear_irq
in sl82c105_bmdma_start()...
And the issue of the same registers being used for both PIO and DMA timings is
not specific for this driver at all but seems to be addressed only by it...
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
drivers/ata/pata_sl82c105.c |4 ++--
1 files changed, 2 insertions(+), 2
but seems to be addressed only by it...
For most drivers (those using the ata_timing interface) the timing merge
is done by ata_timing_compute().
Ah...
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
Acked-by: Alan Cox [EMAIL PROTECTED]
MBR, Sergei
-
To unsubscribe from this list: send
bits while
this is properly handled by ide_dma_{on,off}() methods being called later...
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
drivers/ide/pci/sl82c105.c | 18 --
1 files changed, 4 insertions(+), 14 deletions(-)
Index: linux-2.6/drivers/ide/pci/sl82c105.c
Hello.
Steven Scholz wrote:
How could one then explain
current capacity is 78140160 sectors would be 0x04A85300
native capacity is 185074430006016 sectors would be0xA852FFA85300
? First three bytes ok, then the other three bytes rubbish?
Note that they're not
Hello.
Steven Scholz wrote:
Sergei,
The FPGA does nothing except decoding adresseses from the ARM cpu,
controlling the A[2..0], CS[1..0], IOR, IOW lines of the HDD.
I've not seen you quoting the code that sets ofsset for the
IDE_CONTROL_REG, BTW... Without this register, LBA48 is
Hello.
Alan wrote:
Ugh, I'm not seeing any *actual* support for MW/SW DMA in this driver...
Thats long been broken. Should be correct in the libata driver
I've looked thru the specs and it seemed to me that ULi hardware is much
broken PIO wise: their max active time is 8 cycles
Hello.
Steven Scholz wrote:
Looks like a spurious interrupt... Is your IDE IRQ shared with other
devices?
..
But IIUC then first the HDD times out, the ide driver handles this and
then an irq occurs which is probably the irq the driver was waiting for.
The driver is *not* waiting for
Hello.
Tejun Heo wrote:
Okay, here's another try at fixing the detection bug. I went through
intel ich docs and compared with the ide piix driver. This patch
fixes the following problems.
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index c6bf1a3..51f55a0 100644
---
Hello.
Alan wrote:
Actually, I think ata_timing_merge() should just be performed when
setting MWDMA mode... This should be the right thing to do in most cases
(however, this hardware has some complications in the form of only 2-bit
wide active/recovery counts and 2 fast timing bank select
not work due to passing
to the tuneproc() method's a mode number not biased by XFER_PIO_0 -- fix this
along with a typo in the heading comment...
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
drivers/ide/pci/alim15x3.c | 35 +++
1 files changed, 27 insertions
at it. :-)
Warning: compile tested only -- getting to the real hardware isn't that easy...
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
drivers/ide/pci/cmd64x.c | 92 ---
1 files changed, 32 insertions(+), 60 deletions(-)
Index: linux-2.6/drivers/ide/pci/cmd64x.c
Hello.
Bartlomiej Zolnierkiewicz wrote:
Index: b/drivers/ide/pci/cmd64x.c
===
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -695,9 +695,10 @@ static void __devinit init_hwif_cmd64x(i
hwif-swdma_mask = 0x07;
Fix the PIO mode 2 using mode 0 timings -- this driver should enable the
fast timing bank starting with PIO2, just like the ata_piix driver does.
Also, fix/rephrase some comments while at it.
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
---
drivers/ata/pata_oldpiix.c | 18
Fix clearing/setting the wrong TIME/IE/PPE bits for a slave drive caused by a
wrong shift count.
Fix the PIO mode 1 being overclocked by wrongly selecting the fast timing bank.
Also, fix/rephrase some comments while at it.
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
---
drivers/ata
MPIIX has only single channel IDE which can be configured for either primary or
secondary legacy I/O ports and IRQ. So, get rid of the unneeded second probe
entry in mpiix_init_one() and of the invalid (but unused anyway) enable bits in
mpiix_pre_reset().
Warning: this cleanup has only been
in
mpiix_pre_reset().
Warning: this cleanup has only been compile-tested...
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
---
drivers/ata/pata_mpiix.c | 63 ---
1 files changed, 27 insertions(+), 36 deletions(-)
Index: linux-2.6/drivers/ata/pata_mpiix.c
Alan wrote:
For further review
Turn on the IORDY handling logic.
If a controller doesnt support IORDY don't try and use it
If a device doesn't support IORDY don't try and use it
Looks like we shouldn't change it default PIO mode at all in this case.
See below why...
Otherwise
Hello, I wrote:
@@ -3466,8 +3529,18 @@
tf.command = ATA_CMD_SET_FEATURES;
tf.feature = SETFEATURES_XFER;
tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
+
+/* Older CFA may not support this command */
+if (ata_id_is_cfa(dev-id))
+tf.flags |= ATA_TFLAG_QUIET;
, and add the missing PIO5 support to the speedproc() method while at it. :-)
Warning: compile tested only -- getting to the real hardware isn't that easy...
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
drivers/ide/pci/cmd64x.c | 108 ++-
1 files
are in the merge window
already anyway :-).
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
drivers/ide/pci/piix.c | 45 +
drivers/ide/pci/slc90e66.c | 35 +++
2 files changed, 48 insertions(+), 32 deletions(-)
Index
Hello.
Alan wrote:
Only relevant for DMA really
So rqsize is only needed for DMA accesses?
Not really, it affects both PIO and DMA.
PIO transfers are sector at a time, or multi-sector up to a usual limit
of about 16 sectors.
You're clearly mixing 2 things here. PIO transfers are
Hello.
Steven Scholz wrote:
So rqsize is only needed for DMA accesses?
PIO transfers are sector at a time, or multi-sector up to a usual limit
of about 16 sectors.
So again: rqsize does not matter for PIO transfer?
Looking at the lines
if (hwif-no_lba48_dma lba48 dma) {
Hello.
Alan wrote:
Only relevant for DMA really
So rqsize is only needed for DMA accesses?
Not really, it affects both PIO and DMA.
Yes but its not relevant. The question was about performance, and your
performance will suck equally with PIO regardless of the request size
limit.
: this has been compile-tested only.
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
drivers/ide/pci/cmd64x.c | 80 +--
1 files changed, 36 insertions(+), 44 deletions(-)
Index: linux-2.6/drivers/ide/pci/cmd64x.c
-- it actually consists of only the active and recovery periods,
with only some chips also including the address setup time into equation...
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
drivers/ide/ide-lib.c | 18 ++
include/linux/ide.h |3 ++-
2 files changed, 8
. :-)
Has been kind of tested on SLC90E66. I'm too lazy to reboot my box and test
on ICH4... :-)
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
Signed-off-by: Bartlomiej Zolnierkiewicz [EMAIL PROTECTED]
Index: linux-2.6/drivers/ide/pci/piix.c
is actually
turned on (and do not enable IORDY for DMA). Remove unnecessary code from the
init_hwif() method, improve its looks overall, and also rename the driver's
ide_dma_check() and dma_start() methods.
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
---
The patch has been actually tested
the former
config_for_pio() into the tuneproc() method.
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
---
This patch has also been actually tested at last. :-)
drivers/ide/pci/sl82c105.c | 90 +
include/linux/ide.h|1
2 files changed
The driver's ide_dma_test_irq() method was reading the MRDMODE register even on
PCI0643/6 where it was write-only -- fix this by always reading the backward-
compatible interrupt bits, renaming dma_alt_stat to irq_stat as these interrupt
status bits are not coupled to DMA.
In addition, wrong
' structure, handling
the original PCI0646 via adding the init_setup() method and clearing the 'reg'
field there if necessary...
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
---
Warning: compile-tested only, use on your own risk! ;-)
drivers/ide/pci/cmd64x.c | 39
interrupt bit was tested/cleared for the primary channel --
it's bit 2 in all the chip specs and the driver used bit 1... :-/
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
---
Warning: as usual, this has only been compile-tested. :-)
Grrr, lost signoff somewhere again, so resending...
drivers/ide
the duplicate interrupt status dump (the MRDMODE register bits mirror
those in the CFR and ARTTIM23 registers);
- add spaces in the ?: operators...
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
---
Warning: as usual, this has only been compile-tested. :-)
drivers/ide/pci/cmd64x.c | 99
Mikael Pettersson wrote:
On Thu, 8 Feb 2007 09:58:45 +0100 (MET), Mikael Pettersson wrote:
On Thu, 8 Feb 2007 00:00:32 +0300, Sergei Shtylyov wrote:
Remove the bogus code pretending to set SW/MW DMA timings -- I wonder whether
its author really thought that he could achieve that wrtiting
Hello.
Sergei Shtylyov wrote:
The intent of the patch was exactly to *remove* broken DMA support
until it's fixed (which requires more work). It only worked by chance
-- because MWDMA2 timings are the same as of PIO4. Have patience please.
You may also consider switching
Hello, I wrote:
Change the default for the built-in IDE on p610/p615/p630 from
ide to libata. libata has better error handling and the drive can
recover when hald does its CD media polling.
Signed-off-by: Olaf Hering [EMAIL PROTECTED]
Index:
Hello.
Bartlomiej Zolnierkiewicz wrote:
I'm sorry, how those 2 drivers can be equivalent?! The pata_winbond driver
is for VLB only, sl81c105 was for PCI only -- you certainly want to use
pata_sl82c105 (indeed better version of sl82c105 driver).
I was under the impression that with your
Hello.
Bartlomiej Zolnierkiewicz wrote:
Mikael Pettersson wrote:
Remove the bogus code pretending to set SW/MW DMA timings -- I wonder whether
its author really thought that he could achieve that wrtiting to BMIDE status
registers? Stop fiddling with the DMA capable bits in the speedproc()
Hello.
Bartlomiej Zolnierkiewicz wrote:
I'm sorry, how those 2 drivers can be equivalent?! The pata_winbond driver
is for VLB only, sl81c105 was for PCI only -- you certainly want to use
pata_sl82c105 (indeed better version of sl82c105 driver).
I was under the impression that with your
Hello.
Bartlomiej Zolnierkiewicz wrote:
The intent of the patch was exactly to *remove* broken DMA support
until it's fixed (which requires more work). It only worked by chance
-- because MWDMA2 timings are the same as of PIO4. Have patience please.
You may also consider switching to
Hello, I wrote:
I'm sorry, how those 2 drivers can be equivalent?! The pata_winbond driver
is for VLB only, sl81c105 was for PCI only -- you certainly want to use
pata_sl82c105 (indeed better version of sl82c105 driver).
I was under the impression that with your fixes these drivers
Hello.
Bartlomiej Zolnierkiewicz wrote:
Remove the bogus code pretending to set SW/MW DMA timings -- I wonder whether
its author really thought that he could achieve that wrtiting to BMIDE status
registers? Stop fiddling with the DMA capable bits in the speedproc() -- they
do not enable DMA,
and the driver itself);
- empty/pointless switch cases for the chips other than PCI0646.
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
---
Warning: this is derived from the specs and completely untested. Shouldn't
harm though, as those interrupt bits don't seem to really affect anything,
being
and the driver itself);
- empty/pointless switch cases for the chips other than PCI0646.
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
---
Warning: this is derived from the specs and completely untested. Shouldn't
harm though, as those interrupt bits don't seem to really affect anything,
being
Hello.
Tejun Heo wrote:
ata_probe_ent_alloc() had a temporary hack such that devm_kzalloc()
was used for allocation if devres had been previously initialized on
the device; otherwise, plain kzalloc() was used. This was to make the
code useable from both the old and devres-aware libata drivers
Hello.
James Bottomley wrote:
+probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL);
if (!probe_ent) {
printk(KERN_ERR DRV_NAME (%s): out of memory\n,
kobject_name((dev-kobj)));
[...]
The patch certainly looks mangled tab-wise. :-)
It isn't,
Hello.
Bartlomiej Zolnierkiewicz wrote:
Contains: IRQ-ack fix for ICH chipsets (Albert Lee), ide-floppy unformatted
media fix (Alan Cox), more fixes for IDE PCI drivers (Sergei Shtylyov),
new driver for Toshiba Cell Reference Board (Kou Ishizaki kou.ishizaki
at toshiba.co.jp) and a bunch
Hello.
Sergei Shtylyov wrote:
Contains: IRQ-ack fix for ICH chipsets (Albert Lee), ide-floppy
unformatted
media fix (Alan Cox), more fixes for IDE PCI drivers (Sergei Shtylyov),
new driver for Toshiba Cell Reference Board (Kou Ishizaki kou.ishizaki
at toshiba.co.jp) and a bunch of rather
-by: Sergei Shtylyov [EMAIL PROTECTED]
applied
Thanks!
MBR, Sergei
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to mainline...
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
Signed-off-by: Bartlomiej Zolnierkiewicz [EMAIL PROTECTED]
drivers/ide/pci/sl82c105.c | 112 -
1 files changed, 41 insertions(+), 71 deletions(-)
Index: linux-2.6/drivers/ide/pci/sl82c105.c
to mainline...
Argh! Where those extra pluses camen from in the second hunk?!
Signed-off-by: Sergei Shtylyov [EMAIL PROTECTED]
Signed-off-by: Bartlomiej Zolnierkiewicz [EMAIL PROTECTED]
drivers/ide/pci/sl82c105.c | 112 -
1 files changed, 41 insertions(+), 71
Hello, I wrote:
Contains: IRQ-ack fix for ICH chipsets (Albert Lee), ide-floppy
unformatted
media fix (Alan Cox), more fixes for IDE PCI drivers (Sergei Shtylyov),
new driver for Toshiba Cell Reference Board (Kou Ishizaki kou.ishizaki
at toshiba.co.jp) and a bunch of rather obvious
cleanups
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