From: Sharique Pervaiz <[email protected]>

[Why & How]
Add force_dpg_on_flip debug option so DM can drive a solid-color DPG
pattern on the final flip instead of a real surface flip.

Reviewed-by: Martin Leung <[email protected]>
Signed-off-by: Sharique Pervaiz <[email protected]>
Signed-off-by: Ray Wu <[email protected]>
---
 drivers/gpu/drm/amd/display/dc/dc.h                   |  1 +
 .../gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c   |  7 +++++++
 .../gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 11 +++++++++++
 3 files changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h 
b/drivers/gpu/drm/amd/display/dc/dc.h
index 91d4a8ec7a94..5bd990138f20 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -1188,6 +1188,7 @@ struct dc_debug_options {
        bool enable_dmcub_surface_flip;
        bool usbc_combo_phy_reset_wa;
        bool force_fva;
+       bool force_dpg_on_flip;
        int max_frl_rate;
        unsigned int  force_frl_rate;
        bool ignore_ffe;
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
index b0cc1f2506ba..636cbd947918 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
@@ -1249,6 +1249,13 @@ void dcn20_blank_pixel_data(
        /* get opp dpg blank color */
        color_space_to_black_color(dc, color_space, &black_color);
 
+       /* Debug: force a solid blue DPG pattern. */
+       if (dc->debug.force_dpg_on_flip) {
+               black_color.color_r_cr = 0;
+               black_color.color_g_y = 0;
+               black_color.color_b_cb = 0x3ff;
+       }
+
        if (blank) {
                dc->hwss.set_abm_immediate_disable(pipe_ctx);
 
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
index a843e216a6b0..f2391d45d4c5 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
@@ -2723,6 +2723,17 @@ void dcn401_program_front_end_for_ctx(
                        
pipe->plane_res.hubp->funcs->hubp_wait_pipe_read_start(pipe->plane_res.hubp);
                }
        }
+
+       /* Debug (DM SystemDisplayEnable, driver disabled): force solid-color 
DPG
+        * output last, after all normal pipe/OPP programming, so it isn't 
overwritten.
+        */
+       if (dc->debug.force_dpg_on_flip && hws->funcs.blank_pixel_data) {
+               for (i = 0; i < dc->res_pool->pipe_count; i++) {
+                       pipe = &context->res_ctx.pipe_ctx[i];
+                       if (resource_is_pipe_type(pipe, OTG_MASTER))
+                               hws->funcs.blank_pixel_data(dc, pipe, true);
+               }
+       }
 }
 
 void dcn401_post_unlock_program_front_end(
-- 
2.43.0

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