Phil Smith wrote: >Mmm...I'm pretty sure a single instruction is still atomic. I'm sure Peter >Relson or one of the other IBMers will chime in, but it there has to be some >sort of interlock at some level. And I've debugged plenty of concurrency >problems, never seen a mixture from a single instruction!
>...phsiii I have seen cases where NI and OI instructions were caught by a multi-CP issue. The byte being ANDed or ORed by one CP was modified between the fetch of the old byte and the store for the result by another store from a different CP. There is no atomicity in a single instruction unless POPs says so, such as with CS or CDS. G. Tom Russell “Stay calm. Be brave. Wait for the signs” — Jasper FriendlyBear “… and remember to leave good news alone.” — Gracie HeavyHand
