occam;325048 Wrote: > But with asychcronous reclocking you certainly embed it from the analog > domain of jitter within the digital signal. Simply consider a > asychronous reclocking from nominal 44.1kHz to the same 44.1kHz. Unless > both the input clock and reclocking are jitter free as well as exactly > the same frequency, the result is not going to be bit perfect, nor is > it going to be and exact shift of a perfectly interpolated signal.
You're close, and have hit on one problem... Again, an asynchronous interface will only use the received clock for receiving the data. It's jitter is of no concern, and will never harm the output. The Jitter of the transmit clock, is still a problem, and an asynchronous interface does nothing about that. (But your Wonder DAC is using the latest Super clock isn't it?) A problem -can- arise, if the two clocks are not at exactly the same frequency. As you might guess, if the buffer in the interface isn't large enough, you could overflow or underflow it. As a result you either need a large buffer (which has been done, memory is cheap!) or you end up skipping or adding samples as required. There are potentially audible consequences if the latter technique is used. -- DCtoDaylight Audiophile wish list: Zero Distortion, Infinite Signal to Noise Ratio, and a Bandwidth from DC to Daylight ------------------------------------------------------------------------ DCtoDaylight's Profile: http://forums.slimdevices.com/member.php?userid=7284 View this thread: http://forums.slimdevices.com/showthread.php?t=50147 _______________________________________________ audiophiles mailing list [email protected] http://lists.slimdevices.com/lists/listinfo/audiophiles
