Yes,  what Vinicius said:

>From TD4VM doc at: https://www.ti.com/product/TDA4VM

7.11.5.24 PRU_ICSSG
The device has integrated two identical PRU_ICSSG subsystems (PRU_ICSSG0 
and PRU_ICSSG1). The programmable nature of the PRU cores, along with their 
access to pins, events and all device resources, provides flexibility in 
implementing fast real-time responses, specialized data handling 
operations, custom peripheral interfaces, and in offloading tasks from the 
other processor cores in the device.  

That TD4VM is a real beast. I really look forward to being able to use the 
64-bit ARM cores as the 32-bit Linux world seems to be fading a bit. I also 
use the PRUs for low-level I/O, need that hard real-time access.

I would really like to see a bunch more I/Os available. The Beaglebone 
format is nice size-wise but really seems to constrict access to more of 
the IO goodness.

Maybe a carrier-board format similar to Pi Compute or Jetson?


On Wednesday, January 13, 2021 at 4:27:50 PM UTC-8 [email protected] 
wrote:

> I was looking the TD4VM and there is 2 prus :)
>
> Em qua., 13 de jan. de 2021 às 20:43, Vinicius Juvinski <
> [email protected]> escreveu:
>
>> I have the same question as you Daniel,
>> the PRU in my opinion is one of the most killer feature of beaglebone and 
>> I'm already using BBAI Pru and the 4 PRU's on AI is extremely welcome.
>> Jason, any chance to have PRU with this revision 2 BBAI board?
>>
>> Em qua., 13 de jan. de 2021 às 20:38, Daniel Kulp <[email protected]> 
>> escreveu:
>>
>>> The TDA4VM doesn't have PRU's.   Does that mean use of PRU's is now 
>>> "deprecated" and discouraged?
>>>
>>> Dan
>>>
>>>
>>> On Wednesday, January 13, 2021 at 1:43:02 PM UTC-5 Jason Kridner wrote:
>>>
>>>> BeagleV is something new in addition to BeagleBoard and BeagleBone 
>>>> offerings from BeagleBoard.org. It is meant to address the needs coming 
>>>> from the RISC-V community for a low-cost development board, ultimately 
>>>> with 
>>>> a path to production. We still have a roadmap for BeagleBone!
>>>>
>>>> So, I'll share what I should have shared before, but am still ironing 
>>>> out details on schedule as we are executing this...
>>>>
>>>> There's a minor tweak to BeagleBone AI rev A1a to rev A2, but I'm not 
>>>> sure if it'll go into full production as we have started a rev B with the 
>>>> TDA4VM device from TI. It jumps to A72s and has better software support 
>>>> for 
>>>> the AI accelerators.
>>>>
>>>> One project I'm most excited about is an update to BeagleBone Blue (rev 
>>>> C, rev B used the smaller SIP but had unrelated issues that never got 
>>>> resolved and therefore never got released). I need some more stuff to be 
>>>> released from TI to share more details there, but the motor drive 
>>>> capability will be boosted to enable direct drive of BLDC quadrotors and 
>>>> 3-phase steppers.
>>>>
>>>> And, I'm very, very excited about BeagleConnect technology being worked 
>>>> on at https://github.com/jadonk/beagleconnect based on TI CC1352. This 
>>>> still has a long way to productize, but it is really interesting tech!
>>>>
>>>> We also have some cool stuff being worked by BeagleBoard Compatible 
>>>> makers in the BeagleBone space. For that matter, SeeedStudio BeagleBone 
>>>> Green Gateway hasn't been out very long.
>>>>
>>>> Anyway, the short answer is BeagleV an in-addition-to-BeagleBone thing, 
>>>> not moving away from it.
>>>>
>>>> If interested in BeagleV, please register your interest at BeagleV.org. 
>>>> If you already did so with Seeed, no need to replicate.
>>>>
>>>> On Wed, Jan 13, 2021 at 8:39 AM [email protected] <
>>>> [email protected]> wrote:
>>>>
>>>>>
>>>>> I got a mail message from seeed that introduced the BeagleV. 
>>>>>
>>>>> Although I am very hopeful for a complete opensource hardware and 
>>>>> software platform, I noticed that the pin-layout and the compatibility of 
>>>>> the ARM-Beagleboards has been abandoned. 
>>>>>
>>>>> I also noticed on the specs that the GPIO pins could be used for any 
>>>>> kind of communication protocol, be it UART, SPI, SDIO etc. 
>>>>>
>>>>> I am currently using 3 UART ports on a BeagleBone to communicate with 
>>>>> some peripherals. 
>>>>>
>>>>> Would that still be possible in the new design?
>>>>>
>>>>> I also noted the RS485, or Canbus was not described in the IO.
>>>>>
>>>>> Can anyone involved in the design comment on these observations?
>>>>> (Why abandon the old pin layout, how to implement three UARTS or 2 
>>>>> I2C's, and why no CANBus  availability)
>>>>>
>>>>> Kind Regards
>>>>> Johan Henselmans
>>>>>
>>>>>
>>>>> -- 
>>>>> For more options, visit http://beagleboard.org/discuss
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>>>>>  
>>>>> <https://groups.google.com/d/msgid/beagleboard/3cc933a3-b647-4fe4-b24b-9ba03c478f1fn%40googlegroups.com?utm_medium=email&utm_source=footer>
>>>>> .
>>>>>
>>>>
>>>>
>>>> -- 
>>>> https://beagleboard.org/about/jkridner - a 501c3 non-profit educating 
>>>> around open hardware computing
>>>>
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>>>
>>

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