hi john,
we've brought 6Gsps data into the fpga from
a pair of interleaved adc's, with the fpga running at 375 MHz,
and doing small things with it, like storing samples in a buffer,
or doing a short fft.
but when we add a lot of stuff into the fpga, the fpga no longer
can clock at 375 MHz.
suraj also developed a yellow block adc which further demuxes
the data so you can bring in 6 Gsps data while
running the fpga at 375/2 MHz, but then there is a very wide
data path, and it takes up a lot of fabric to process this data.
suraj is planning on hardening the yellow block cores
so that their routing/timing is locked down, independent
of what else is running in the fpga.
best wishes,
dan
On 4/22/2010 2:57 PM, Mark Wagner wrote:
Hi John,
I don't think anyone has been able to get a spectrometer working at
the full 3GS/s interleaved yet. The best Suraj and I have been able
to do is about 2.4Gs/s before we start running into serious timing
issues. We do have plans to meet soon with a Xilinx timing expert in
the hopes of resolving our issues.
Mark
On Thu, Apr 22, 2010 at 2:12 PM, John Ford <[email protected]
<mailto:[email protected]>> wrote:
Hi all.
Has anyone done a 6 GS/s spectrometer using 2 interleaved 3 GS/s ADC
boards on a ROACH? I seem to recall someone doing something of
the sort,
but I don't recall any details.
Thanks for any info!
John
