On Friday 18 April 2008, Łukasz Bromirski wrote: > Please note, PA-GE was designed "for connectivity" before VIP4 was > released for 7500 so it's pretty old linecard.
PA-GE + VIP2-50 = GEIP, essentially. GEIP+ on 7500 is a VIP4-80 plus a dual width PA, and does much better. But, then again, it has two intel 82543GC's instead of the single LSI L2A1157 on the PA-GE. Yeah, two Gigabit NIC chips, one attached to one PCI bus, the other to the other. Interesting way to do it. Dual SerDes chips, but one GBIC. Cute. 32-bit PCI GigE interfaces like the chip and connection used on the PA-GE/GEIP are limited to 133MB/s absolute max; in practice they won't go anywhere near that (the actual chip is the same chip used in the GigE interfaces used by older PIXen's PCI gigabit cards; older Intel e1000's, which work very well under Linux, incidentally). The dual NIC arrangement in the GEIP+ is cute, but the 'PA' from it is not, to the best of my knowledge and search of various resources, supported as a dual-width PA by a 7200 (unlike the SRPIP OC12's alter ego, the PA-SRPIP). -- Lamar Owen Chief Information Officer Pisgah Astronomical Research Institute 1 PARI Drive Rosman, NC 28772 (828)862-5554 www.pari.edu _______________________________________________ cisco-nsp mailing list [email protected] https://puck.nether.net/mailman/listinfo/cisco-nsp archive at http://puck.nether.net/pipermail/cisco-nsp/
