casaroli commented on code in PR #20993:
URL: https://github.com/apache/nuttx/pull/20993#discussion_r4424020516
##########
arch/arm/src/common/stm32/stm32_serial_m33_v3.c:
##########
@@ -1576,6 +1576,33 @@ static void stm32serial_setformat(struct uart_dev_s *dev)
uint32_t regval;
uint32_t brr;
uint32_t cr1;
+ uint32_t cr1_ue;
+ irqstate_t flags;
+ int timeout;
+
+ /* Wait for any ongoing transmission to complete before disabling UE */
+
+ regval = stm32serial_getreg(priv, STM32_USART_CR1_OFFSET);
+ if ((regval & (USART_CR1_UE | USART_CR1_TE)) ==
+ (USART_CR1_UE | USART_CR1_TE))
+ {
+ timeout = 50000;
Review Comment:
`timeout = 5000` is still a count of loop passes: at 160 MHz (STM32U5) about
10 cycles per pass give about 0.3 ms, but TDR and the shift register can still
hold two characters, 2.1 ms at 9600 baud, so UE is still cleared in the middle
of a frame. `tcsetattr()` with `TCSADRAIN` or `TCSAFLUSH` already drains the
output before `TCSETS` (`libs/libc/termios/lib_tcsetattr.c:88`).
Fix: remove the TC wait in all six files, as #20914 did for L4.
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