On 29.05.2009 14:41, Alexander Gordeev wrote: > So it seems the right way this time: when WP# is pulled low and TBL# is > high leads to exactly the same situation as I have. >
Yes. I looked at the wrong data sheet when I requested WE# information. Sorry. > On Fri, 29 May 2009 13:40:41 +0200 > Carl-Daniel Hailfinger <[email protected]> wrote: > > >> GPIOs: 11(SIO), 12(inverted), 13, 14(SIO), 16(SIO), 17(SIO), >> 35(pullup), 40(pullup), 53 >> all SIOs are Input >> SIO base: 0x0800 >> >> That leads me to the assumption that the WP# pin is probably not >> connected to the SuperIO and the WE# pin may be connected to the >> SuperIO, but without function. >> > > I hope WP# is connected... > It may be connected to the southbridge instead. That would make adding code for it very difficult unless we find someone with specs. Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
