On Tue, May 26, 2009 at 12:19:26PM +0200, Luc Verhaegen wrote: > > This is the same as another report (another nvidia board), except for a > different IO offset (0x44C0 + 0x10): > http://tracker.coreboot.org/trac/coreboot/ticket/131
Can anyone with a trac account read the opens...@... email address and include this person in CC. It would be nice the get the following from that guy as well: > Can you provide the output of lspci -vvnxxx so that we: > * get device/subsystem id pairs for the board enable table. > * can spot the location of the pmio base address and make this function > useful for both cases. Thanks, Luc Verhaegen. -- coreboot mailing list: [email protected] http://www.coreboot.org/mailman/listinfo/coreboot
