On Mon, 2011-01-31 at 13:36 +0800, Adam Wang wrote: > While running Flickernoise, the FLASH_RESET_N doesn't act(goes low) > under conditions below: > 1, press 'Reboot' button
It is supposed to pulse low at this time. Either you missed the pulse (it's only a few hundred nanoseconds) or there is a bug somewhere in the FPGA design. Pressing the 3 buttons at the same time should also reset, again with a low pulse on FLASH_RESET_N. > 2, press 'Power off' button The flash does not reset there, this is expected. > Thus the RP# (Reset) is ONLY occurred while M1 power on. If I am right > then I can directly cut the route from FPGA then solder it connected > to reset ic. Please don't - we need the ability to reset the flash from the FPGA in order to be able to recover from an interrupted write sequence. > Otherwise this cut will become complicated( thus is to add another > AND gate for accepting both output from reset ic and fpga then AND > gate's output goes to flash RP# pin). To implement then AND, can't we just use a pull-up resistor and the open drain version of the reset IC connected in parallel on the FPGA pin? Before configuration, the FPGA has a weak pull-up on this pin which would not interfere with the reset IC, and after configuration I can do whatever I want with this pin. S. _______________________________________________ http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org IRC: #milkymist@Freenode Twitter: www.twitter.com/milkymistvj Ideas? http://milkymist.uservoice.com
