Am Donnerstag 21 Juli 2011, 10:22:21 schrieb Sebastien Bourdeauducq: > On Thu, 2011-07-21 at 09:42 +0200, Michael Walle wrote: > > ps. imho the irq handling and some cores (like the uart one) needs some > > rework. atm the driver code needs to manually ack the UART irq, which is > > a lm32 arch specific function call (apart from that, the uart driver is > > generic). Additionally, there is no polling possible atm with the UART > > core. > > What about making the IRQs level-sensitive with IP read-only (as > discussed on IRC) and make the "IRQ active" bit visible in each core's > status registers?
some random thoughts on modifying the lm32 pic to be level sensitive and removing the interrupt mask register: - if we want to push lm32 support upstream, we would have to support two interrupt controllers in the linux port and qemu. - linux wouldn't have any possibility to disable one specific interrupt on its own (eg. disabling spurious interrupts) - although it is duplicating handling, its general practice -- michael _______________________________________________ http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org IRC: #milkymist@Freenode Twitter: www.twitter.com/milkymistvj Ideas? http://milkymist.uservoice.com
