On 10/15/2025, Marek Vasut wrote:
> On 10/15/25 10:59 AM, Liu Ying wrote:
>
> Hello Liu,
Hello,
>
>>>>> @@ -90,13 +102,15 @@ patternProperties:
>>>>> compatible:
>>>>> const: fsl,imx8qxp-dc-signature
>>>>>
>>>>> - "^tcon@[0-9a-f]+$":
>>>>> + "^tcon(@[0-9a-f]+)?$":
>>>>
>>>> why here allow no address unit tcon?
>>> This might be something Liu can clarify too.
>>>
>>> TCON on iMX95 DPU does not seem to exist at all, or at least has no control
>>> registers. Hence no address.
>>
>> i.MX95 DC hasn't got TCON so it should not be documented for i.MX95 DC.
>
> What DT node do I attach the pixel-mapper/pixel-interleaver to then ?
It's Dither unit which sits in the last position of an i.MX95 DC display stream.
BTW, i.MX8qxp/qm DCs haven't got any Dither unit. The existing i.MX8qxp DC
DT bindings have already documented all units within i.MX8qxp DC(I hope I didn't
miss any unit). And TCON is the last one for i.MX8qxp/qm DC display stream.
Have you got i.MX95 DC IP spec? If no, then it would be difficult for you to
write DT bindings for all i.MX95 DC units. Note that this is something
necessary to do.
And, a bit more information about display pipelines in i.MX95 display domain:
Dither -> pixel interleaver -> pixel link loopback -> camera domain
-> pixel link -> MIPI DSI controller
-> pixel mapper(LDB)
Note that NXP downstream kernel wrongly adds pixel link between pixel
interleaver and pixel mapper due to ambiguous i.MX95 TRM.
--
Regards,
Liu Ying
