Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [High] phy: qcom: edp: resource leak on error paths in qcom_edp_phy_init --
commit 21c4ca6694dd5d440a6b00869831eb17626e0879 Author: Ritesh Kumar <[email protected]> phy: qcom: edp: Generalize power-on path for per-SoC overrides This patch generalizes the power-on path by introducing a data-driven loop for TX resistor writes and adding several SoC-specific registers to the configuration structure. It also makes the com_clk_fwd_cfg callback optional. > diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c > b/drivers/phy/qualcomm/phy-qcom-edp.c > index d5c6835b6c704..c5df1086607f0 100644 > --- a/drivers/phy/qualcomm/phy-qcom-edp.c > +++ b/drivers/phy/qualcomm/phy-qcom-edp.c [ ... ] > @@ -313,9 +328,11 @@ static int qcom_edp_phy_init(struct phy *phy) > > memcpy(aux_cfg, edp->cfg->aux_cfg, sizeof(aux_cfg)); > > - ret = edp->cfg->ver_ops->com_clk_fwd_cfg(edp); > - if (ret) > - return ret; > + if (edp->cfg->ver_ops->com_clk_fwd_cfg) { > + ret = edp->cfg->ver_ops->com_clk_fwd_cfg(edp); > + if (ret) > + return ret; [Severity: High] Does this error path leak the regulators and clocks? Earlier in qcom_edp_phy_init(), regulators and clocks are successfully enabled via regulator_bulk_enable() and clk_bulk_prepare_enable(). If the newly wrapped optional com_clk_fwd_cfg() callback returns an error, the function returns directly. This entirely bypasses the out_disable_supplies cleanup label, resulting in a permanent leak of the regulator references. Furthermore, there is no corresponding clk_bulk_disable_unprepare() call at all, meaning the clocks will permanently leak as well. > + } > > writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | > DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, -- Sashiko AI review ยท https://sashiko.dev/#/patchset/[email protected]?part=8
