From: Ritesh Kumar <[email protected]> Add Nord-specific AUX channel, VCO divider, LDO and TX resistor calibration data: edp_phy_aux_cfg_nord[], edp_phy_vco_div_cfg_nord[], qcom_edp_ldo_config_nord() and tx_res_cfg_nord[], sourced from HPG Tables 2-1-a, 2-1-b and 2-1-d.
Signed-off-by: Ritesh Kumar <[email protected]> Signed-off-by: Nabige Aala <[email protected]> --- drivers/phy/qualcomm/phy-qcom-edp.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c index 3e857d105668..cb5f6e0ae607 100644 --- a/drivers/phy/qualcomm/phy-qcom-edp.c +++ b/drivers/phy/qualcomm/phy-qcom-edp.c @@ -1741,6 +1741,39 @@ static int qcom_edp_com_configure_pll_nord(const struct qcom_edp *edp) return 0; } +static const u8 edp_phy_aux_cfg_nord[DP_AUX_CFG_SIZE] = { + 0x00, 0x13, 0xa4, 0x00, 0x0a, 0x26, 0x0a, 0x03, 0x37, 0x03, 0x02, 0x02, 0x04, +}; + +static const u8 edp_phy_vco_div_cfg_nord[4] = { + 0x00, 0x00, 0x02, 0x01, +}; + +static int qcom_edp_ldo_config_nord(const struct qcom_edp *edp) +{ + const struct phy_configure_opts_dp *dp_opts = &edp->dp_opts; + + writel(0xd0, edp->tx0 + TXn_LDO_CONFIG); + writel(dp_opts->lanes > 2 ? 0xd0 : 0x00, edp->tx1 + TXn_LDO_CONFIG); + writel(0x03, edp->edp + DP_PHY_LDO_CFG_NORD); + + return 0; +} + +static const struct qcom_edp_tx_res_entry tx_res_cfg_nord[] = { + { 0, TXn_RES_CODE_LANE_OFFSET_TX0, 0x06 }, + { 0, TXn_RES_CODE_LANE_OFFSET_TX1, 0x06 }, + { 1, TXn_RES_CODE_LANE_OFFSET_TX0, 0x06 }, + { 1, TXn_RES_CODE_LANE_OFFSET_TX1, 0x06 }, + { 0, TXn_TX_EMP_POST1_LVL, 0x06 }, + { 1, TXn_TX_EMP_POST1_LVL, 0x06 }, + { 0, TXn_TX_BAND_NORD, 0x05 }, + { 1, TXn_TX_BAND_NORD, 0x05 }, + { 2, DP_PHY_TX_LN0_DRV_LVL_NORD, 0x12 }, + { 2, DP_PHY_TX_LN1_DRV_LVL_NORD, 0x12 }, + QCOM_EDP_TX_RES_ENTRY_END, +}; + static const struct of_device_id qcom_edp_phy_match_table[] = { { .compatible = "qcom,glymur-dp-phy", .data = &glymur_phy_cfg, }, { .compatible = "qcom,sa8775p-edp-phy", .data = &sa8775p_dp_phy_cfg, }, -- 2.34.1
