On Friday, June 15, 2012 11:10:42 PM Jon Elson did opine: > gene heskett wrote: > > To start with mosfet/hexfet's have one very non-endearing feature. > > Because they are effectively the perfect equivalent to a vacuum tube > > triode, they also share a attribute known as miller effect in the > > tube world. This makes them look as if there is a large capacitor > > from drain to gate, which is in fact the gates input capacitance, > > which for some devices can exceed 25,000pf, but since a goodly amount > > of that is drain-gate capacitance, it is then multiplied by the > > transconductance of the device, some of which exceed 25 mhos! It > > can't switch any faster that the gate driver circuit can charge or > > discharge this amplified capacitance. So the gates driver stage, in > > addition to being floated at the src point for the 2 bugs at the top > > of the bridge, must itself be capable of delivering that current fast > > enough to achieve the switching speed desired. That could easily be > > 100 amps, for that 10 to 15 nanoseconds. > > I just redesigned my brushless servo amp due to this problem. The IR > triple half-bridge > driver chips only put out 200 mA of gate drive. The single half-bridge > chips I use > in my brush amp is good to 2 A. So, I changed to using 3 chips to get > more drive > to the FET gates, so I could have shorter dead time without risking > shoot-through. > > Jon I wasn't thinking about shoot through Jon, although that too is a valid design check.
The characteristic I was yakking about was the transition time. When 95% of the power wasted heating the device junction occurs during the transition while it isn't fully on or fully off, you make this transition time as short as possible, it is the only way to make the device survive in everyday, all day service. Stretch that 10ns out to 20 u-secs at a rep rate of 20-30 kilohertz and you'll need to have a failure strategy in place that might need to include fire extinguishers. :( Your idea of triple chipping the driver is an excellent one, but needs a storage capacitor directly across the chip(s) supply pins, 2" of pcb trace away won't cut it. Its got to be right there on those 2 pins, and a capacitor per chip is probably a very good idea. Electrolytics aren't a great idea either because of ESR buildup over time, but I saw some 50 volt, 2 u-f dipped mylar caps not too long ago that might be just what the doctor ordered. PCB traces for those should be as wide as you can steal room from the other low power circuitry from. The common rail between the output devices source, and the middle of the driver chip circuitry is probably the most important trace on the board. Short & fat should be the target. Cheers, Gene -- "There are four boxes to be used in defense of liberty: soap, ballot, jury, and ammo. Please use in that order." -Ed Howdershelt (Author) My web page: <http://coyoteden.dyndns-free.com:85/gene> I have found little that is good about human beings. In my experience most of them are trash. -- Sigmund Freud ------------------------------------------------------------------------------ Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ _______________________________________________ Emc-developers mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/emc-developers
