Fred, et al

Vic's original question asked about test conditions; and that is what the 
responses dealt with.  As a matter of fact, the responses were very focused on 
the question that was asked.  

In the original question, I saw no discussion of the desired compliance level.  
 For all I know, Vic could be testing a bare chip or integrated circuit for 
which a compliance level of 1000V could be sufficient.    The come-back which I 
 received, below,  assumes that Vic needs the 4KV, 8KV or higher compliance 
levels typical of most complete products.  That may be true; and I think that 
you bring up an important point that engineers need to focus on proper ESD 
design as well as ESD testing.

So, I consider your message to be worthwhile; even while I consider the 
criticism in its first sentence to be off target.  

Chris Maxwell | Design Engineer - Optical Division
email chris.maxw...@nettest.com | dir +1 315 266 5128 | fax +1 315 797 8024

NetTest | 6 Rhoads Drive, Utica, NY 13502 | USA
web www.nettest.com | tel +1 315 797 4449 | 

> -----Original Message-----
> From: Fred Townsend [SMTP:f...@poasana.com]
> Sent: Wednesday, June 12, 2002 12:27 PM
> To:   Chris Maxwell
> Cc:   Gibling, Vic; emc-p...@majordomo.ieee.org
> Subject:      Re: An ESD question
> 
> 
> It is interesting to see how easy it is to lose focus.  The problem is not 
> the humidity, approach speed, etc. as Richard has suggested.  Yes, they are 
> factors but not the problem.  The problem is a massive design flaw. 800 volts 
> is way too low.  The fact there are multiple failure modes supports the 
> conclusion something major is wrong. The designers needs to review their ESD 
> suppression and grounding of this product. You may need to call in an ESD or 
> SI expert. This product is not ready for prime time.
> 
> This discussion would be relevant if we were trying to sneak through a 
> product that passed at 4 KV but failed at 5 KV but not at 0.8KV.
> 
> Fred Townsend
> 

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