Hi Marko,

Thanks for your suggestions.

Core voltages are identical
SerDes voltages are also same
I believe new chip has more transistors, but how does that affect EMI on 
the serial link.

Regards
Ravinder Ajmani
HGST, a Western Digital company
5601 Great Oaks Pkwy
San Jose, CA 95119-1003
[email protected]




Marko Radojicic <[email protected]> 
03/22/2014 10:23 PM

To
"[email protected]" <[email protected]>
cc
"[email protected]" <[email protected]>
Subject
Re: [PSES] Higher EMI from ASIC built with new process






A few items to consider

1 Core voltage
2 Serdes voltage
3 Internal chip architecture - new chip may have millions more transistors

Higher voltages will result in much higher emi even if rise/fall time is 
same.

...Marko

Sent from my iPhone

On Mar 22, 2014, at 9:03 PM, [email protected] wrote:


Hi Ken, 

Thanks for your response.  The rise/fall time in the new ASIC is firmware 
controlled to match the rise/fall time of the older ASIC.  Measurements 
were made with a 30 GHz bandwidth scope, so I don't think scope bandwidth 
is limiting the rise/fall time measurement.  I agree that flip chip will 
result in faster rise time, but measurements are being made at the end of 
the 2" long PCB trace, using SMA connectors. 

Regards
Ravinder Ajmani
HGST, a Western Digital company
5601 Great Oaks Pkwy
San Jose, CA 95119-1003
[email protected] 


Ken Wyatt <[email protected]> 
03/22/2014 08:18 PM 


To
"[email protected]" <[email protected]> 
cc
"[email protected]" <[email protected]> 
Subject
Re: [PSES] Higher EMI from ASIC built with new process








It could be your scope doesn't really show the true rise time of the 
faster chip. I suspect the flip chip really does have faster rise times.

Kenneth Wyatt 
Wyatt Technical Services LLC 
Woodland Park, CO 
[email protected] 
www.emc-seminars.com 
(Sent from my iPad) 

On Mar 22, 2014, at 8:38 PM, [email protected] wrote:


Hi Experts, 

I am comparing EMI from two ASICs.  Both have identical rise/fall times 
and signal amplitude.  Yet the ASIC built with the later technology not 
only has significantly higher radiated emissions, but also shows much 
broader noise spectrum.  PCB stackup and layout is identical.  Please help 
me understand what other factors can be responsible for this anomaly. 

The older ASIC uses a wirebond package, whereas the new ASIC has flip chip 
package. 

Regards
Ravinder Ajmani
HGST, a Western Digital company
5601 Great Oaks Pkwy
San Jose, CA 95119-1003
[email protected]
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