Hi Cortland,

What you say makes sense to me.  Thanks for your feedback.  I need to take 
another look at the decoupling.

Regards
Ravinder Ajmani
HGST, a Western Digital company
5601 Great Oaks Pkwy
San Jose, CA 95119-1003
[email protected]




CR <[email protected]> 
03/22/2014 11:19 PM
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[email protected]


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Subject
Re: [PSES] Higher EMI from ASIC built with new process






Ravinder,

While an output waveform may be limited "in firmware"* that does not mean 
it is limited on the chip; my experience is that a major cause of EMI when 
using faster devices as replacements is that the current the replacement 
draws due to non-limited internal functions is switched much faster than 
the original, so that, due to trace or package inductance, the board's 
charge storage capacitance may not supply current fast enough to prevent 
Vcc and ground bounce -- which appears on non-risetime-limited I/O, power, 
control, BITE and power pins/balls.  There can also be radiated coupling 
to non-filtered or non-shielded conductors both on the PWB and off.

*(Possibly by switching in one of several output buffers with different 
series resistors)

Cortland Richmond 

On 3/22/2014 9:38 PM, [email protected] wrote:
I am comparing EMI from two ASICs.  Both have identical rise/fall times 
and signal amplitude.  Yet the ASIC built with the later technology not 
only has significantly higher radiated emissions, but also shows much 
broader noise spectrum.  PCB stackup and layout is identical.  Please help 
me understand what other factors can be responsible for this anomaly. 

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