On Fri, 26 Aug 2011, Kirk Wallace wrote:

> Date: Fri, 26 Aug 2011 15:51:27 -0700
> From: Kirk Wallace <[email protected]>
> Reply-To: "Enhanced Machine Controller (EMC)"
>     <[email protected]>
> To: "Enhanced Machine Controller (EMC)" <[email protected]>
> Subject: Re: [Emc-users] D510 EPP problem
> 
> On Fri, 2011-08-26 at 15:26 -0700, Peter C. Wallace wrote:
> My analysis...
> ... snip
>> patched config utility to set port in EPP mode
>>
>> patch does this
>>
>> temp <= inb(base+0x402)
> copies data in the ECR to temp
>
>> temp <= temp and 0x1F
> clears the top three bits to 000, leaves the rest alone,
> but 000 = SPP
>
>> temp <= temp or 0x80
> sets bit 7 to 1, so top three are now 100 = EPP
>
>> outb(base+0x402,temp)
> write the new byte to the ECR
>
> showport.c should do the same thing, what base was used?



0x378 (which I just guessed since the Intel bios gives no hints of port 
location) and is almost imossible to get into setup mode (what a POS that 
BIOs is)



> -- 
> Kirk Wallace
> http://www.wallacecompany.com/machine_shop/
> http://www.wallacecompany.com/E45/index.html
> California, USA
>
>
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Peter Wallace
Mesa Electronics

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EMC VNX: the world's simplest storage, starting under $10K
The only unified storage solution that offers unified management 
Up to 160% more powerful than alternatives and 25% more efficient. 
Guaranteed. http://p.sf.net/sfu/emc-vnx-dev2dev
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