On Sat, 27 Aug 2011, Viesturs L?cis wrote:
Date: Sat, 27 Aug 2011 10:29:26 +0300
From: "[UTF-8] Viesturs L?cis" <[email protected]>
Reply-To: "Enhanced Machine Controller (EMC)"
<[email protected]>
To: "Enhanced Machine Controller (EMC)" <[email protected]>
Subject: Re: [Emc-users] D510 EPP problem
2011/8/27 Jon Elson <[email protected]>:
Peter C. Wallace wrote:
It may in fact be something else (maybe a bad port), as Kirks patch doesnt
seem to help on viesturs machine and his port acts "funny" reading 0s with
nothing attached while my test machine reads FFs. I also show 0 trouble with
the hardware. The ECR reg EPP mode setting stuff _is_ in the 7I43 driver so I
dont really know whats going on at this point. Probably have to try some low
level poking about
Yes, something seemed wrong, as all the registers were reading back 255
(base 10) which is
not normal. I think Viesturs was fixated on getting the BIOS report to
read right, and that
won't happen. Thus, he was missing the strange behavior of the port itself.
So what can I do now? Peter mentioned some low level poking. How can I
do that and what tools do I need for that?
Well If you can boot DOS there is a low level loopback test program that might
at least shed light from a different direction.
freeby.mesanet.com/epp.zip has the utilities
first you need to make a bootable DOS something (USB stick?) with those
utilities included
Then run SC7I43P SVST6_6.BIT 378
If this fails, do
IN 77A (read the DCR)
and
IN 37C (read the EPP data register)
to give me an idea whats going on
If the SC7I43P succeeds
then run
EPTTEST 378
And I would appreciate, if any user would share their experience
suggestions for EPP-capable PCI add-in card.
Viesturs
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Peter Wallace
Mesa Electronics
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EMC VNX: the world's simplest storage, starting under $10K
The only unified storage solution that offers unified management
Up to 160% more powerful than alternatives and 25% more efficient.
Guaranteed. http://p.sf.net/sfu/emc-vnx-dev2dev
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