On Tuesday 26 May 2020 15:55:36 N wrote: > > ... > > I just tried an experiment. Since there are no pid's in that > > sheldon setup, I commented out the *ERROR entries in the .ini file. > > Interesting as it made zero difference in how it ran. So, it appears > > that I'll need to synth an error signal, and the best way I can > > think of it to subtract the command to a stepgen from the feedback, > > or vice-versa, but w/o an encoder actually measuring that axis, its > > not going to tell me anything but the time lags caused by the addf > > order. ... > > It come as a suprise it tell anything but the time lag? > > I already discovered time lag add quite much error but it could be > compensanted. > Not compensated for, but re-arrange the addf order until any one signal falls thru its whole processing chain in one thread invocation. So follow a signal from origin to output, and use that as your addf order top to bottom. Timing problems dissappear as if by magic. > > Nicklas Karlsson > > > _______________________________________________ > Emc-users mailing list > Emc-users@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/emc-users
Cheers, Gene Heskett -- "There are four boxes to be used in defense of liberty: soap, ballot, jury, and ammo. Please use in that order." -Ed Howdershelt (Author) If we desire respect for the law, we must first make the law respectable. - Louis D. Brandeis Genes Web page <http://geneslinuxbox.net:6309/gene> _______________________________________________ Emc-users mailing list Emc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-users
