From: juewang <[email protected]>

Some targets only provide a valid issue rate when instruction scheduling
is enabled.  Fall back to serial costing when flag_schedule_insns is
false.

Assisted-by: Codex (OpenAI)

gcc/ChangeLog:

        * ifcvt.cc (noce_parallel_seq_cost): Fall back to serial cost when
        instruction scheduling is disabled.

gcc/testsuite/ChangeLog:

        * gcc.target/riscv/ifcvt-parallel-cost-1.c: New test.
        * gcc.target/riscv/ifcvt-parallel-cost-2.c: Likewise.
        * gcc.target/riscv/ifcvt-parallel-cost-3.c: Likewise.
---
 gcc/ifcvt.cc                                  |  4 ++-
 .../gcc.target/riscv/ifcvt-parallel-cost-1.c  | 26 +++++++++++++++++
 .../gcc.target/riscv/ifcvt-parallel-cost-2.c  | 29 +++++++++++++++++++
 .../gcc.target/riscv/ifcvt-parallel-cost-3.c  | 28 ++++++++++++++++++
 4 files changed, 86 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/ifcvt-parallel-cost-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/ifcvt-parallel-cost-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/ifcvt-parallel-cost-3.c

diff --git a/gcc/ifcvt.cc b/gcc/ifcvt.cc
index 8df6c3a6527..404185301b4 100644
--- a/gcc/ifcvt.cc
+++ b/gcc/ifcvt.cc
@@ -867,7 +867,9 @@ noce_parallel_seq_cost (rtx_insn *seq, bool speed_p)
 {
   unsigned int serial_cost = seq_cost (seq, speed_p);
 
-  if (!speed_p || !targetm.sched.issue_rate)
+  if (!speed_p
+      || !flag_schedule_insns
+      || !targetm.sched.issue_rate)
     return serial_cost;
 
   unsigned int issue_rate = MAX (targetm.sched.issue_rate (), 1);
diff --git a/gcc/testsuite/gcc.target/riscv/ifcvt-parallel-cost-1.c 
b/gcc/testsuite/gcc.target/riscv/ifcvt-parallel-cost-1.c
new file mode 100644
index 00000000000..1bec3f77dcd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/ifcvt-parallel-cost-1.c
@@ -0,0 +1,26 @@
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-Os" "-Oz" } } */
+/* { dg-options "-O2 -march=rv64gc_zicond -mabi=lp64d -mtune=xt-c9501fdvt 
-mbranch-cost=3" } */
+
+extern void consume (void *, void *, void *);
+
+__attribute__ ((noinline, noclone))
+void
+select_three_pointers (long x, long y,
+                      void *a0, void *a1,
+                      void *b0, void *b1,
+                      void *c0, void *c1)
+{
+  if (x > y)
+    {
+      a0 = a1;
+      b0 = b1;
+      c0 = c1;
+    }
+
+  consume (a0, b0, c0);
+}
+
+/* { dg-final { scan-assembler-times "\\sczero\\.eqz\\s" 3 } } */
+/* { dg-final { scan-assembler-times "\\sczero\\.nez\\s" 3 } } */
+/* { dg-final { scan-assembler-not "\\s(?:bge|bgt|ble|blt)\\s" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/ifcvt-parallel-cost-2.c 
b/gcc/testsuite/gcc.target/riscv/ifcvt-parallel-cost-2.c
new file mode 100644
index 00000000000..6e1f9ed7849
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/ifcvt-parallel-cost-2.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-Os" "-Oz" } } */
+/* { dg-options "-O2 -march=rv64gc_zicond -mabi=lp64d -mtune=generic 
-mbranch-cost=3" } */
+
+extern void consume (void *, void *, void *);
+
+__attribute__ ((noinline, noclone))
+void
+select_three_pointers_generic (long x, long y,
+                              void *a0, void *a1,
+                              void *b0, void *b1,
+                              void *c0, void *c1)
+{
+  if (x >= y)
+    {
+      a0 = a1;
+      b0 = b1;
+      c0 = c1;
+    }
+
+  consume (a0, b0, c0);
+}
+
+/* The generic tuning model has an issue rate of one, so the three pointer
+   selections are not profitable at a branch cost of three.  */
+
+/* { dg-final { scan-assembler-times "\\sbge\\s" 1 } } */
+/* { dg-final { scan-assembler-not "\\sczero\\.eqz\\s" } } */
+/* { dg-final { scan-assembler-not "\\sczero\\.nez\\s" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/ifcvt-parallel-cost-3.c 
b/gcc/testsuite/gcc.target/riscv/ifcvt-parallel-cost-3.c
new file mode 100644
index 00000000000..c499b2fe089
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/ifcvt-parallel-cost-3.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-Os" "-Oz" } } */
+/* { dg-options "-O2 -march=rv64gc_zicond -mabi=lp64d -mtune=xt-c9501fdvt 
-mbranch-cost=3 -fno-schedule-insns" } */
+
+extern void consume (void *, void *, void *);
+
+__attribute__ ((noinline, noclone))
+void
+select_three_pointers_no_sched (long x, long y,
+                               void *a0, void *a1,
+                               void *b0, void *b1,
+                               void *c0, void *c1)
+{
+  if (x >= y)
+    {
+      a0 = a1;
+      b0 = b1;
+      c0 = c1;
+    }
+
+  consume (a0, b0, c0);
+}
+
+/* Do not use the issue rate when instruction scheduling is disabled.  */
+
+/* { dg-final { scan-assembler-times "\\sbge\\s" 1 } } */
+/* { dg-final { scan-assembler-not "\\sczero\\.eqz\\s" } } */
+/* { dg-final { scan-assembler-not "\\sczero\\.nez\\s" } } */
-- 
2.34.1

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