On 9/1/26 5:52 PM, wangjue wrote:
seq_cost treats every instruction in a replacement sequence as serial.
This can overestimate simple register-only sequences on superscalar
targets and reject profitable if-conversion.
Build dependency levels for simple, unit-cost register operations.
Cost each level using the target issue rate. Fall back to the serial
cost for unsupported sequences, size optimization, and targets without
an issue rate hook.
Changes since v1:
v4: Format the multi-line conditional according to GNU coding style.
v3: Refactor instruction validation and dependency-level calculation into
separate helpers. Add comments explaining the intent of the parallel cost
model.
v2: Guard against calling targetm.sched.issue_rate when the hook is not
defined.
gcc/ChangeLog:
* ifcvt.cc (noce_parallel_cost_node): New.
(noce_parallel_costed_insn_p): New.
(noce_dependency_level): New.
(noce_parallel_seq_cost): New.
(default_noce_conversion_profitable_p): Use it.
So the sh4 failure in my tester is almost certainly unrelated to this patch.
So I've pushed this version to the trunk. THanks for your patience.
For the future, please consider including testcases. There's numerous
folks that can help with that process. For this issue I would have
likely done a risc-v specific test because we can control things via
-mbranch-cost to verify that at a particular branch cost the 3
conditional move sequence if-converts.
jeff
