> On 2011-06-21 06:17:19, Korey Sewell wrote:
> > src/arch/mips/isa/decoder.isa, line 1559
> > <http://reviews.m5sim.org/r/748/diff/3/?file=13061#file13061line1559>
> >
> >     I see, the instruction was defined in a non-intuitive way.
> >     
> >     Another way to write this (from the SEE MIPS RUN book is):
> >     Fr.sf - (Fs.sf * Ft.sf) for nmsub_s
> >     and
> >     -1 * (Fs.sf * Ft.sf + Fr.sf) for nmadd_s
> >     
> >     I agree w/your updates now. However, how did you find this error? 
> > Through inspection or running a benchmark? If the latter, we need to add 
> > that regression (or a similar one) to preserve that functionality.

Well, we don't have a benchmark containing the two instructions. I just 
happened to see this by comparing the newly code with an earlier stable 
version..


- Deyuan


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On 2011-06-21 02:16:53, Deyuan Guo wrote:
> 
> -----------------------------------------------------------
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.m5sim.org/r/748/
> -----------------------------------------------------------
> 
> (Updated 2011-06-21 02:16:53)
> 
> 
> Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and 
> Nathan Binkert.
> 
> 
> Summary
> -------
> 
> Make the newly gem5 support mips branch likely instruction again.
> Fix 4 files:
> src/arch/mips/isa/formats/branch.isa
> src/cpu/inorder/inorder_dyn_inst.cc
> src/cpu/inorder/resources/branch_predictor.cc
> src/cpu/inorder/resources/fetch_seq_unit.cc
> 
> 
> Diffs
> -----
> 
>   src/arch/mips/isa/decoder.isa 00766f5b8177 
>   src/arch/mips/isa/formats/branch.isa 00766f5b8177 
>   src/cpu/inorder/inorder_dyn_inst.cc 00766f5b8177 
>   src/cpu/inorder/resources/branch_predictor.cc 00766f5b8177 
>   src/cpu/inorder/resources/fetch_seq_unit.cc 00766f5b8177 
> 
> Diff: http://reviews.m5sim.org/r/748/diff
> 
> 
> Testing
> -------
> 
> Tested.
> 
> 
> Thanks,
> 
> Deyuan
> 
>

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